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Physical Design Engineer Intern Jobs in Roxbury, MA

Apple

SoC Physical Design Engineer, PnR

Waltham, MA · On-site

$146K - $151K/yr

Description In Physical Design, you will be at the center of design effort collaborating with architecture, CAD, timing and logic design teams, with a critical impact on delivering best in class ...

Nvidia

Senior CPU Design Engineer

Westford, MA · Hybrid

You will work closely with fellow design engineers, architects, verification engineers, and physical design engineers to accomplish your tasks. What you will be doing: * Drive the micro-architecture ...

Apple

SoC Physical Design Engineer, PnR

Waltham, MA

$134K - $249K/yr

We are seeking a seasoned Physical Design technical leader with deep expertise in high-performance & low-power design. In this highly visible role, you will work closely with cross-functional teams ...

Apple

SoC Physical Design Engineer, PnR

Waltham, MA

$116K - $175K/yr

Description In Physical Design, you will be at the center of design effort collaborating with architecture, CAD, timing and logic design teams, with a critical impact on delivering best in class ...

Leidos

Substation Physical Engineer

Framingham, MA · On-site

$101K - $129K/yr

Candidates will be expected to use knowledge of digital logic design, AC and DC circuits to design ... Engineer Intern ("EI" or "EIT") professional certification. * Professional Engineer ("PE") License.

Leidos

Substation Physical Engineer

Framingham, MA · On-site

$101K - $129K/yr

Candidates will be expected to use knowledge of digital logic design, AC and DC circuits to design ... Engineer Intern ("EI" or "EIT") professional certification. * Professional Engineer ("PE") License.

Apple

SoC Physical Design Engineer, STA/Timing

Waltham, MA · On-site

$146K - $151K/yr

In this visible role, you will be directly responsible for the physical implementation of design ... Minimum Qualifications Minimum BS and 10+ years of relevant industry experience Strong programming ...

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All JobsPhysical Design Engineer Intern JobsPhysical Design Engineer Intern Jobs in Roxbury, MA

Physical Design Engineer Intern information

See Roxbury, MA salary details

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How much do physical design engineer intern jobs pay per hour?

As of Aug 11, 2026, the average hourly pay for physical design engineer intern in Roxbury, MA is $20.96, according to ZipRecruiter salary data. Most workers in this role earn between $17.50 and $22.69 per hour, depending on experience, location, and employer.

What skills and qualifications are needed to thrive as a physical design engineer intern?

To thrive as a Physical Design Engineer Intern, you generally need a solid background in electrical engineering, digital circuit design, and semiconductor fundamentals, often supported by ongoing university studies in a related field. Familiarity with industry-standard EDA tools such as Cadence, Synopsys, or Mentor Graphics, as well as scripting languages like TCL or Python, is highly valuable. Attention to detail, problem-solving abilities, and effective teamwork are crucial soft skills for excelling in this role. These skills and qualifications are important because they ensure accurate chip layouts, efficient workflows, and successful collaboration within complex engineering teams.

What types of projects and tasks can a physical design engineer intern expect to work on during their internship?

As a Physical Design Engineer Intern, you will typically be involved in supporting the design and verification of integrated circuits at the physical level. Common tasks include assisting with floorplanning, placement and routing, timing analysis, and running design rule checks using industry-standard EDA tools. You may also participate in team meetings, collaborate with senior engineers, and help resolve issues related to power, performance, and area optimization. These hands-on experiences are designed to help you build practical skills and gain a deeper understanding of the physical design flow in VLSI chip development.

What is a physical design engineer intern?

A physical design engineer intern is a student or entry-level professional gaining hands-on experience in the physical implementation of integrated circuits, including tasks like floorplanning, placement, routing, and timing analysis. They typically work with electronic design automation (EDA) tools and collaborate with engineering teams to optimize chip performance and manufacturability.

What does a physical design engineer intern do?

A Physical Design Engineer Intern assists in the process of transforming a circuit design (RTL) into a real, manufacturable layout for semiconductor chips. They work on tasks such as floorplanning, placement, routing, timing analysis, and verifying that the chip design meets all physical and electrical requirements. Interns typically use electronic design automation (EDA) tools to perform these tasks and collaborate with experienced engineers. Their work is crucial in ensuring that chips are both functional and manufacturable at scale.

What is the difference between Physical Design Engineer Intern vs Digital Design Engineer Intern?

AspectPhysical Design Engineer InternDigital Design Engineer Intern
Required CredentialsTypically pursuing or holding a degree in Electrical Engineering or Computer EngineeringTypically pursuing or holding a degree in Electrical Engineering or Computer Engineering
Work EnvironmentDesigning and implementing physical chip layouts, working with EDA toolsDesigning digital logic circuits, working on HDL coding and simulation
Industry UsageFoundries, semiconductor companies, integrated circuit design firmsSemiconductor companies, integrated circuit design firms, tech companies

Physical Design Engineer Interns focus on translating digital logic designs into physical layouts for chips, working closely with EDA tools. Digital Design Engineer Interns concentrate on creating and simulating digital logic circuits using hardware description languages. Both roles are essential in chip development but differ in their specific tasks and focus areas.

What job categories do people searching Physical Design Engineer Intern jobs in Roxbury, MA look for? The top searched job categories for Physical Design Engineer Intern jobs in Roxbury, MA are:
What cities near Roxbury, MA are hiring for Physical Design Engineer Intern jobs? Cities near Roxbury, MA with the most Physical Design Engineer Intern job openings:
Physical Design Engineer Intern jobs near you
Infographic showing various Physical Design Engineer Intern job openings in Roxbury, MA as of August 2026, with employment types broken down into 1% As Needed, 75% Full Time, 18% Part Time, 1% Temporary, 4% Contract, and 1% Nights. Highlights an 95% Physical, 2% Hybrid, and 3% Remote job distribution, with an average salary of $43,599 per year, or $21 per hour.

Physical Design Engineer, Synthesis and Implementation

NVIDIA Gruppe

Westford, MA • On-site

$116 - $189.75/hr

Other

Posted 6 days ago

Job description

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.

NVIDIA is looking for best-in‑class Physical Design Engineers with expertise in Synthesis to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in crafting our groundbreaking and innovating chips, enjoy working in meaningful, growing and professional environment where you make a significant impact in a technology‑focused company.

What you'll be doing:
  • Own RTL-to-gate synthesis and QoR convergence for complex digital blocks and hierarchical partitions.
  • Optimize synthesis strategies, constraints, and flows to meet performance, power, and area targets.
  • Analyze design bottlenecks and QoR regressions, collaborating with RTL, timing, architecture, and physical design teams to resolve them.
  • Support physical implementation from floorplanning and power planning through routing and timing closure.
  • Automate design setup, execution, reporting, and issue triage while improving project-wide methodologies and best known methods.
What we need to see:
  • BSEE, MSEE, or equivalent experience.
  • 2+ years of experience in synthesis and physical implementation on advanced process nodes.
  • Strong proficiency with Synopsys Fusion Compiler, Cadence Genus, or comparable synthesis tools.
  • Hands‑on experience with synthesis constraints, timing analysis, QoR optimization, and the full place‑and‑route flow.
  • Strong analytical and debugging skills across RTL, synthesis, timing, and physical implementation.
  • Proficiency in Python, Perl, Tcl, and Make.
  • Strong communication and multi‑functional collaboration skills.

We welcome you join our team with some of the most hard‑working people in the world working together to promote rapid growth. Are you passionate about becoming a part of a best‑in‑class team supporting the latest in GPU and AI technology? If so, we want to hear from you.

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 116,000 USD - 189,750 USD for Level 2, and 136,000 USD - 218,500 USD for Level 3.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until August 4, 2026.

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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