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Physical Design Engineer Intern Jobs in Grapevine, TX

Physical Design Engineer

Frisco, TX · On-site

$100 - $130/hr

About the role This is a full time position with our company doing Physical Design Engineering. What you'll do * Lead end to end Physical Design from floorplan to GDS * Own full PnR flow: placement ...

Physical Design Engineer

Frisco, TX · On-site

$127K - $131K/yr

This is a full time position with our company doing Physical Design Engineering. What you'll do * Lead end to end Physical Design from floorplan to GDS * Own full PnR flow: placement, CTS, routing ...

Project Engineer Intern

Addison, TX · On-site

$16.25 - $21/hr

Malin is looking for a Project Design Engineering Intern that will be responsible for design aspects of supply chain, distribution and warehousing systems -- conveyors, sortation and carousels ...

Project Engineer Intern

Addison, TX

$16.25 - $21/hr

Malin is looking for a Project Design Engineering Intern that will be responsible for design aspects of supply chain, distribution and warehousing systems -- conveyors, sortation and carousels ...

Project Engineer Intern

Addison, TX

$16.25 - $21/hr

Malin is looking for a Project Design Engineering Intern that will be responsible for design aspects of supply chain, distribution and warehousing systems -- conveyors, sortation and carousels ...

Project Engineer Intern

Addison, TX · On-site

$16.25 - $21/hr

Malin is looking for a Project Design Engineering Intern that will be responsible for design aspects of supply chain, distribution and warehousing systems -- conveyors, sortation and carousels ...

Engineer Intern

Grand Prairie, TX · On-site

$18 - $21/hr

Design & Build Experience (i.e. Robot team, Catapult Team, HPVC Team, or personal projects) Who We ... physical or mental disability, age, ancestry, legally protected medical condition, family care ...

Engineer Intern

Grand Prairie, TX · On-site

$18 - $21/hr

Design & Build Experience (i.e. Robot team, Catapult Team, HPVC Team, or personal projects) Who We ... physical or mental disability, age, ancestry, legally protected medical condition, family care ...

Engineer Intern

Grand Prairie, TX · On-site

$18 - $21/hr

Design & Build Experience (i.e. Robot team, Catapult Team, HPVC Team, or personal projects) Who We ... physical or mental disability, age, ancestry, legally protected medical condition, family care ...

Design & Build Experience (i.e. Robot team, Catapult Team, HPVC Team, or personal projects) Who We ... physical or mental disability, age, ancestry, legally protected medical condition, family care ...

HBM SoC Physical Design Engineer

Richardson, TX · On-site

$123K - $127K/yr

As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the implementation of advanced HBM SoC logic/base die designs from netlist to GDSII. You will work ...

HBM SoC Physical Design Engineer

Richardson, TX · On-site

$123K - $127K/yr

As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the implementation of advanced HBM SoC logic/base die designs from netlist to GDSII. You will work ...

RTL Design Engineer

Richardson, TX · On-site +1

$122K/yr

Work closely with analog/mixed-signal, physical design, firmware, product, and customer-facing ... Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field

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Physical Design Engineer Intern information

See Grapevine, TX salary details

$10

$17

$27

How much do physical design engineer intern jobs pay per hour?

As of Aug 19, 2026, the average hourly pay for physical design engineer intern in Grapevine, TX is $17.84, according to ZipRecruiter salary data. Most workers in this role earn between $14.86 and $19.33 per hour, depending on experience, location, and employer.

What does a physical design engineer intern do?

A Physical Design Engineer Intern assists in the process of transforming a circuit design (RTL) into a real, manufacturable layout for semiconductor chips. They work on tasks such as floorplanning, placement, routing, timing analysis, and verifying that the chip design meets all physical and electrical requirements. Interns typically use electronic design automation (EDA) tools to perform these tasks and collaborate with experienced engineers. Their work is crucial in ensuring that chips are both functional and manufacturable at scale.

What skills and qualifications are needed to thrive as a physical design engineer intern?

To thrive as a Physical Design Engineer Intern, you generally need a solid background in electrical engineering, digital circuit design, and semiconductor fundamentals, often supported by ongoing university studies in a related field. Familiarity with industry-standard EDA tools such as Cadence, Synopsys, or Mentor Graphics, as well as scripting languages like TCL or Python, is highly valuable. Attention to detail, problem-solving abilities, and effective teamwork are crucial soft skills for excelling in this role. These skills and qualifications are important because they ensure accurate chip layouts, efficient workflows, and successful collaboration within complex engineering teams.

What types of projects and tasks can a physical design engineer intern expect to work on during their internship?

As a Physical Design Engineer Intern, you will typically be involved in supporting the design and verification of integrated circuits at the physical level. Common tasks include assisting with floorplanning, placement and routing, timing analysis, and running design rule checks using industry-standard EDA tools. You may also participate in team meetings, collaborate with senior engineers, and help resolve issues related to power, performance, and area optimization. These hands-on experiences are designed to help you build practical skills and gain a deeper understanding of the physical design flow in VLSI chip development.

What is the difference between Physical Design Engineer Intern vs Digital Design Engineer Intern?

AspectPhysical Design Engineer InternDigital Design Engineer Intern
Required CredentialsTypically pursuing or holding a degree in Electrical Engineering or Computer EngineeringTypically pursuing or holding a degree in Electrical Engineering or Computer Engineering
Work EnvironmentDesigning and implementing physical chip layouts, working with EDA toolsDesigning digital logic circuits, working on HDL coding and simulation
Industry UsageFoundries, semiconductor companies, integrated circuit design firmsSemiconductor companies, integrated circuit design firms, tech companies

Physical Design Engineer Interns focus on translating digital logic designs into physical layouts for chips, working closely with EDA tools. Digital Design Engineer Interns concentrate on creating and simulating digital logic circuits using hardware description languages. Both roles are essential in chip development but differ in their specific tasks and focus areas.

What are popular job titles related to Physical Design Engineer Intern jobs in Grapevine, TX?

For Physical Design Engineer Intern jobs in Grapevine, TX, the most frequently searched job titles are:

What cities near Grapevine, TX are hiring for Physical Design Engineer Intern jobs?

Cities near Grapevine, TX with the most Physical Design Engineer Intern job openings:

Infographic showing various Physical Design Engineer Intern job openings in Grapevine, TX as of August 2026, with employment types broken down into 1% As Needed, 77% Full Time, 18% Part Time, 1% Temporary, 2% Contract, and 1% Nights. Highlights an 97% Physical, 1% Hybrid, and 2% Remote job distribution, with an average salary of $37,116 per year, or $17.8 per hour.

Physical Design Engineer

Talent 101 Inc

Frisco, TX • On-site

$100 - $130/hr

Other

Re-posted 3 days ago


Job description

About Talent 101 Inc

Talent 101 is an Engineering and IT services provider, with clients that range from start-up to Fortune 500. We specialize in solutions for the Semiconductor, Automotive, Electronics, Energy, Telecom, and Defense industries.

About the role

This is a full time position with our company doing Physical Design Engineering.

What you’ll do
  • Lead end to end Physical Design from floorplan to GDS
  • Own full PnR flow: placement, CTS, routing, optimization, ECOs
  • Run, debug, and close DRC/LVS for foundry clean signoff
  • Drive timing closure using Tempus with strong constraint ownership
  • Perform synthesis and QoR optimization using Genus
  • Improve PPA across block level and IP level designs
  • Partner with internal IP teams to prepare blocks for tapeout readiness
  • Deliver signoff reports and support final tapeout package creation
Qualifications
  • 5+ years’ Physical Design experience
  • Strong hands on proficiency with Cadence Innovus, Tempus, and Genus
  • Proven success supporting internal IP tapeout
  • Ability to collaborate across RTL, verification, and integration teams

Talent101 pays referral fees.

Applicants must be at least 18 years or older, must be willing to take a drug test and background check as part of the selection process and must have legal authorization to work in the United States.

Talent 101 is an equal opportunity employer and supports a diverse, inclusive work environment. All qualified applicants will receive consideration for employment without regard to protected characteristics, including race, color, religion, sex, national origin, disability, veteran status, sexual orientation, gender identity or age.

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