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Pdk Engineer Jobs in California (NOW HIRING)

MaxLinear, Inc.

Principal Device Engineer

Carlsbad, CA · On-site

$142K - $191K/yr

Test structure design for device layout/structure optimization and PDK development for advanced ... Strong ownership to lead engineering projects * BS in Electrical Engineering or related + 9 years ...

MaxLinear, Inc.

Principal Device Engineer

Carlsbad, CA · On-site

$142K - $191K/yr

Test structure design for device layout/structure optimization and PDK development for advanced ... Strong ownership to lead engineering projects * BS in Electrical Engineering or related + 9 years ...

Intel

Design Automation Engineer (TFM/EDA)

Folsom, CA · On-site

$117K - $227K/yr

Closely partner with PDK/library experts, flow development teams, as well as with product design teams * Collaborate with EC to provision adequate compute capacity and help debug any associated ...

NuByt, Inc

Be Seen First

Senior CAD Engineer

San Jose, CA · On-site

$90 - $100/hr

PDK & Infrastructure Management * Install, qualify, and maintain advanced foundry PDKs for FinFET ... Improve engineering productivity by reducing manual effort and streamlining workflows. * Serve as ...

Intel

Design Automation Engineer (TFM/EDA)

Santa Clara, CA · On-site

$117K - $227K/yr

Closely partner with PDK/library experts, flow development teams, as well as with product design teams * Collaborate with EC to provision adequate compute capacity and help debug any associated ...

Cisco

Technical Program Manager- IP/PDK

San Jose, CA · On-site

$167K - $245K/yr

Prior experience with multi-party threads, writing summaries for executives and engineers, and keeppre-silicon and post-siliconstakeholders aligned. * Prior experience withIP installation,PDK ...

MaxLinear, Inc.

Director of Device Engineering

Irvine, CA · On-site

$187K - $225K/yr

Generate semiconductor device & PDK development plans and take ownership of project execution * Manage and drive MaxLinear device engineering group, providing clear targets to each engineer * Work ...

Nokia

Senior Analog EDA/CAD ASIC Engineer

Sunnyvale, CA · On-site

$120K - $171K/yr

Tasks will include significant tool and PDK customization and design team support. The self-motivated engineer must be able to anticipate problems and devise effective solutions. Responsibilities:

Ayar Labs

Sr. Staff Engineer, Photonics Design

San Jose, CA · On-site

$180K - $240K/yr

Sr. Staff Engineer, Photonics Design Location: San Jose (on-site) Ayar Labs is shattering AI data ... PDK you're given, but influencing what that process can achieve. And you'll shape the design and ...

Ayar Labs

Sr. Staff Engineer, Photonics Design

San Jose, CA · On-site

$180K - $240K/yr

Sr. Staff Engineer, Photonics Design Location: San Jose (on-site) Ayar Labs is shattering AI data ... PDK you're given, but influencing what that process can achieve. And you'll shape the design and ...

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Showing results 21-40

All JobsPdk Engineer JobsPdk Engineer Jobs in California

Pdk Engineer information

See California salary details

$36K

$105.9K

$135.7K

How much do pdk engineer jobs pay per year?

As of Aug 10, 2026, the average yearly pay for pdk engineer in California is $105,877.00, according to ZipRecruiter salary data. Most workers in this role earn between $87,300.00 and $134,200.00 per year, depending on experience, location, and employer.

What are some typical challenges faced by PDK engineers in their daily work?

PDK Engineers often face the challenge of ensuring that design kits remain compatible with rapidly evolving process technologies and EDA tool updates. They must carefully balance accuracy and performance when validating, debugging, and documenting PDK components, often under tight project timelines. Collaboration with process engineers, design teams, and EDA tool vendors is essential to resolve technical issues and ensure seamless integration. This dynamic environment requires adaptability and strong troubleshooting skills to deliver reliable PDKs that meet the evolving needs of semiconductor designers.

What are the key skills and qualifications needed to thrive as a PDK engineer?

To thrive as a PDK Engineer, you need a strong background in semiconductor physics, process technology, and electronic design automation (EDA), typically with a degree in electrical engineering or a related field. Experience with tools like Cadence Virtuoso, Mentor Graphics, and proficiency in scripting languages such as Python and TCL are highly valuable. Excellent problem-solving abilities, communication skills, and attention to detail set candidates apart in this highly collaborative role. These skills and qualities are critical for ensuring accurate and efficient delivery of Process Development Kits, which are essential for successful semiconductor design flows.

What is a PDK engineer?

A PDK (Process Design Kit) Engineer is responsible for developing, maintaining, and validating process design kits used in semiconductor design and fabrication. They work closely with foundries, design teams, and EDA (Electronic Design Automation) tool vendors to ensure accurate models, rule files, and automation scripts for technology nodes. PDK Engineers play a crucial role in optimizing design flow, ensuring manufacturability, and improving process efficiency in semiconductor development.

What are the most commonly searched types of Pdk Engineer jobs in California? The most popular types of Pdk Engineer jobs in California are:
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Pdk Engineer jobs near you
Infographic showing various Pdk Engineer job openings in California as of August 2026, with employment types broken down into 100% Full Time. Highlights an 100% In-person job distribution, with an average salary of $105,877 per year, or $50.9 per hour.

Senior Technology Engineer

Lattice Semiconductor

San Jose, CA

$122K - $168K/yr

Full-time

Re-posted 12 hours ago

Job description

Lattice OverviewThere is energy here...energy you can feel crackling at any of our international locations. It's an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality. Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a "team first" organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you're looking for.Responsibilities & Skills

Role:

Responsible for the interface between Lattice engineering and external foundries to enable successful process adoption and on-time tape-out. Ensure PDK readiness, and ensure alignment between internal EDA, design teams, and foundry requirements.

Key responsibilities:

  • Serve as the primary technical interface to foundries, driving technical alignment, issue resolution, and escalations
  • Partner with EDA teams on procurement, validation, and rollout of PDKs, models, and technology collateral
  • Ensure design and signoff flows align with foundry requirements (DRC/LVS, EM/IR, ESD, SI/PI, reliability, etc.)
  • Own device test structure definition and support silicon characterization to validate process assumptions
  • Establish and scale processes for managing technology collateral, documentation, and design methodology consistency across programs

Qualifications:

Required

  • BS/MS/PhD in Electrical Engineering or related field
  • 10+ years in semiconductor technology and foundry interfacing roles
  • Deep understanding of advanced process nodes and device physics
  • Proven ability to work with external partners (foundry, EDA, and IP vendors)
  • Strong cross-functional collaboration and communication skills

Preferred

  • Direct experience with TSMC and Samsung foundry ecosystems
  • Strong understanding of CAD/EDA flows (PDK, reliability, ESD, EM/IR, SI/PI, etc.)
  • Experience supporting tape-out and silicon validation across multiple nodes
Employment Type: FULL_TIME

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