ZipRecruiter

Log In

1

Pcie Engineer Jobs (NOW HIRING)

Google

TPU PCIe RTL Design Engineer

Sunnyvale, CA · On-site

As a PCIe Design Engineer, you will architect and implement SoC-level RTL for our next-generation data center accelerators. Beyond designing high-performance PCIe subsystems, you will build the ...

TylSemi

Principal PCIe Subsystem RTL lead

San Jose, CA · On-site

$159K - $164K/yr

Mentor and guide RTL design engineers responsible for PCIe subsystem implementation, providing architectural guidance and RTL review. * Partner with the DV team to define the PCIe UVM verification ...

previous pagenext page

Showing results 21-40

All JobsPcie Engineer Jobs

Pcie Engineer information

See salary details

$31K

$95.8K

$127.5K

How much do pcie engineer jobs pay per year?

As of Aug 9, 2026, the average yearly pay for pcie engineer in the United States is $95,796.00, according to ZipRecruiter salary data. Most workers in this role earn between $81,000.00 and $116,000.00 per year, depending on experience, location, and employer.

What is a PCIe engineer?

A PCIe Engineer is a professional who specializes in designing, developing, testing, and troubleshooting hardware and firmware related to PCI Express (PCIe) technology. PCIe is a high-speed serial computer expansion bus standard used to connect components like GPUs, SSDs, and network cards to a computer's motherboard. PCIe Engineers work on ensuring compatibility, optimizing performance, and resolving issues in systems that use PCIe interfaces, often collaborating with hardware, firmware, and software teams.

What are some common challenges a PCIe engineer faces when working on high-speed interface designs?

PCIe Engineers frequently encounter challenges related to signal integrity, timing closure, and ensuring interoperability among different hardware components. Troubleshooting issues such as crosstalk, electromagnetic interference, and maintaining compliance with the latest PCI Express specifications requires a keen attention to detail and regular use of specialized tools. Collaboration with cross-functional teams—including hardware designers, firmware developers, and validation engineers—is essential to quickly identify and resolve these issues, ensuring reliable and high-performance system operation.

What is the difference between Pcie Engineer vs Hardware Engineer?

AspectPcie EngineerHardware Engineer
Required CredentialsBachelor's in Electrical/Computer Engineering, knowledge of PCIe standardsBachelor's or higher in Electrical, Computer, or Electronics Engineering
Work EnvironmentDesigning, testing PCIe interfaces, working in R&D or product developmentDesigning and testing various hardware components, including PCIe devices
Industry UsagePrimarily in semiconductor, computer hardware, and electronics industriesBroadly in electronics, computer hardware, telecommunications, and embedded systems

While both roles involve hardware design and testing, a Pcie Engineer specializes in PCIe interface development and standards, whereas a Hardware Engineer has a broader focus on various hardware components. The Pcie Engineer's expertise is more specific to high-speed interface protocols, making it a specialized subset within hardware engineering.

What are the key skills and qualifications needed to thrive as a PCIe engineer?

To thrive as a PCIe Engineer, you need a solid background in electrical or computer engineering, strong understanding of PCI Express (PCIe) protocols, and experience with high-speed digital design. Familiarity with industry-standard tools such as oscilloscopes, logic analyzers, protocol analyzers, and simulation software, as well as knowledge of relevant standards and certifications like PCI-SIG, are typically required. Strong problem-solving skills, attention to detail, and effective communication are valuable soft skills for this role. These qualifications are crucial for ensuring reliable, high-performance PCIe integration and interoperability in complex hardware systems.
More about Pcie Engineer jobs
What cities are hiring for Pcie Engineer jobs? Cities with the most Pcie Engineer job openings:
What states have the most Pcie Engineer jobs? States with the most job openings for Pcie Engineer jobs include:
What job categories do people searching Pcie Engineer jobs look for? The top searched job categories for Pcie Engineer jobs are:
Pcie Engineer jobs near you
Infographic showing various Pcie Engineer job openings in the United States as of August 2026, with employment types broken down into 92% Full Time, 2% Part Time, and 6% Contract. Highlights an 87% Physical, 4% Hybrid, and 9% Remote job distribution, with an average salary of $95,796 per year, or $46.1 per hour.

Principal Engineer, PCIe Verification (AI2441)

SiMa Technologies

San Jose, CA

$220K - $296K/yr

Full-time

Re-posted 10 days ago

Job description

Job Title: Principal Engineer, PCIe Verification        
     
Job Location: San Jose, CA (This position requires a full-time, on-site presence in our San Jose, CA office) 
     
Job ID: AI2441   
     
Description:   
    
The Design Verification (DV) engineer at SiMa is involved in the functional verification of PCIe controller and PCIe-phy at block, sub-system and MLSoC level. Will also be involved in PCIe bring-up and debug on emulator. Generate required PCIe controller and phy initialization (register programming code sequence) for PCIe bring up in Simulation, emulation and on silicon. Work on UCIe interface verification on next generation projects. 
 
Job Description: 
 
As the PCIe Design Verification Engineer, you will  
  • Participate in PCIe architecture, micro-architecture, feature discussions and reviews. 
  • Define and develop PCIe test bench components using UVM & System Verilog. 
  • Bring up and testing of PCIe in block and full-chip test environment. 
  • Develop and execute a test plan. 
  • Verification execution of PCIe EP/RC functionality and performance measurements. 
  • Lead Code coverage reviews and closure. System Verilog Assertion functional coverage development and closure. 
  • Manage debug of test and regression failures, as well emulation failures.  
  • Work closely with the Architecture, MLSoC Hardware and MLA Software teams. 
  • Work with emulation and MLSoC Software team to bring up and debug PCIe. 
  • Work in the lab on PCie interface silicon debug with software and systems team as and when needed. 
 
Required Background: 
  • BS/MS in EE (Electrical Engineering) or CS (Computer Science) with 12+ years of experience in functional verification and silicon bring-up/debug. 
  • Very good current working experience of UVM and System Verilog based verification methodology is a must. 
  • Working experience on PCIe protocols Gen4/5. 
  • Working experience on PCIe bring-up and debug on Silicon is a plus. 
  • Past working experience on UCIe protocols is a plus. 
  • Proficiency in C/C++/Python programming is a plus.
  • Good debug and problem solving skill.
  
Personal attributes:  
     
Can-do attitude. Strong team player. Curious, creative and good at solving problems. Execution and results-oriented. Self-driven, Thinks Big and is highly accountable. Good communication skills.  
    
The annual salary for this position ranges from $220,000 - $296,400. The actual annual salary offered will depend on several factors, including - among others - job-related skills, experience, technical expertise, qualifications, work location, and business needs. The annual salary range for this position is subject to change and may be adjusted in the future.   
 
In addition to base salary, this role is also eligible for private company equity, and a comprehensive package of employee benefits. Please note that the salary ranges listed for U.S. roles reflect base salary only and do not include equity or other forms of compensation.
       
     
EEO Employer: SiMa is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Apply