Packaging Design Project Manager Jobs in Portland, OR

Job Details:Job Description: 

We are seeking an experienced Silicon Packaging Design Engineer with a strong background in board design and package-board integration to drive the end-to-end development of test boards supporting advanced silicon package validation and characterization. The successful candidate will be responsible for board design execution from concept through tapeout, ensuring high-quality, manufacturable designs that meet electrical, mechanical, performance, and cost objectives.

This role requires close collaboration with package design, test vehicle design, validation, and laboratory teams to optimize board requirements, package-board performance, and system-level integration. The ideal candidate will bring deep technical expertise in PCB design, signal integrity considerations, manufacturing requirements, and design rule compliance, along with a proven track record of delivering complex designs in high-volume semiconductor environments.

Key Responsibilities

• Drive end-to-end development of test board designs from concept through tapeout.
• Perform board planning, floor planning, routing studies, and physical layout implementation.
• Conduct board fit and routing studies to evaluate design, performance, manufacturability, and cost tradeoffs.
• Partner closely with package design, test engineering, and validation teams to define board requirements and optimize package-board interactions.
• Develop and validate board connectivity, ensuring design integrity and compliance with project specifications.
• Perform design rule checks (DRCs) and manufacturing design rule validation to ensure successful fabrication and assembly.
• Lead internal and external design reviews and drive resolution of design issues and DRC violations.
• Collaborate with board fabrication and assembly vendors to obtain design approval and support manufacturing readiness.
• Define and maintain board design guidelines, standards, and best practices.
• Analyze design data and technical results to identify opportunities for optimization and continuous improvement.
• Create and maintain design documentation and release collateral within Product Lifecycle Management (PLM) systems.
• Support root cause analysis and troubleshooting activities related to board design, package-board integration, and test hardware performance.

What You'll Bring

• Strong technical leadership and ownership mindset.
• Complex projects independently while collaborating across global teams.
• Excellent analytical and troubleshooting skills.
• Customer-focused and results-driven approach.
• Passion for innovation and continuous improvement in silicon packaging and board design.

Qualifications:

Minimum qualifications are required to be initially considered for this position.

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. This position is not eligible for Intel immigration sponsorship

Minimum Qualifications

• Master's degree in Electrical Engineering or Mechanical Engineering.
• +10 years of experience with PCB layout utilizing Cadence Allegro and Cadence Constraint Manager.
• +5 years of experience in:
  • Hardware development including: Schematic Entry, Signal Integrity, and Power Delivery practices and theories, constraint entry, library creation, DFM, DFX.
  • Managing highly complex PCB designs both individually as well as part of a team while working across multiple sites.
  • Expertise in board design and development, interconnect methodologies, and manufacturability principles.
  • Expertise in various board technologies and manufacturing process and fundamentals.
  • Demonstrated experience and proficiency with board design rules and design rule check resolution.

Preferred Qualifications

• Experience with additional PCB design tools such as Siemens Xpedition.
• Minimum of 8 years of experience with a broad range of PCB form factors, HDI/Type4 PCB technology.
• Previous experience with communicating with board manufacturing vendors to review and obtain design approval meeting vendors manufacturing capabilities.
• Experience interacting with board vendors regarding their capability and design rules roadmap and align internal design teams on design rules roadmap.
• Previous experience managing external CAD contract workers to meet project demands.
• Manage multiple projects, schedules, and multi-disciplined teams in a dynamic, fast-paced environment working across organization boundaries and geographies.

Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Arizona, PhoenixAdditional Locations:US, Oregon, HillsboroPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $164,470.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.