Python, TCL) Understanding of challenges related to latest deep sub-micron technology and ability to write algorithms and code to extract PPA during Implementation Strong interpersonal skills and ...
Python, TCL) Understanding of challenges related to latest deep sub-micron technology and ability to write algorithms and code to extract PPA during Implementation Strong interpersonal skills and ...
Python, TCL) Understanding of challenges related to latest deep sub-micron technology and ability to write algorithms and code to extract PPA during Implementation Strong interpersonal skills and ...
Python, TCL) Understanding of challenges related to latest deep sub-micron technology and ability to write algorithms and code to extract PPA during Implementation Strong interpersonal skills and ...
... micron technology Produce impactful design fixes and automate wherever possible, spanning multiple tool domains in physical construction and analysis Working knowledge of industry standard tools like ...
... micron technology Produce impactful design fixes and automate wherever possible, spanning multiple tool domains in physical construction and analysis Working knowledge of industry standard tools like ...
... micron technology Produce impactful design fixes and automate wherever possible, spanning multiple tool domains in physical construction and analysis Working knowledge of industry standard tools like ...
... micron technology Produce impactful design fixes and automate wherever possible, spanning multiple tool domains in physical construction and analysis Working knowledge of industry standard tools like ...
CPU Physical Design Engineer
Beaverton, OR · On-site
$141K - $145K/yr
... micron technology, along with its implications to timing, power, and area Excellent communication and interpersonal skills Ability to work independently and/or lead a physical design partition in ...
CPU Physical Design Engineer
Beaverton, OR · On-site
$141K - $145K/yr
... micron technology, along with its implications to timing, power, and area Excellent communication and interpersonal skills Ability to work independently and/or lead a physical design partition in ...
CPU Physical Design Engineer
Beaverton, OR · On-site
$141K - $145K/yr
... micron technology, along with its implications to timing, power, and area Excellent communication and interpersonal skills Ability to work independently and/or lead a physical design partition in ...
CPU Physical Design Engineer
Beaverton, OR · On-site
$141K - $145K/yr
... micron technology, along with its implications to timing, power, and area Excellent communication and interpersonal skills Ability to work independently and/or lead a physical design partition in ...
CPU Physical Design Engineer
$184K - $324K/yr
... micron technology, along with its implications to timing, power, and area Excellent communication and interpersonal skills Ability to work independently and/or lead a physical design partition in ...
CPU Physical Design Engineer
$184K - $324K/yr
... micron technology, along with its implications to timing, power, and area Excellent communication and interpersonal skills Ability to work independently and/or lead a physical design partition in ...
... micron technologies and device physics Experience using synthesis & place-route tools Minimum Qualifications Minimum BS and 3+ years of relevant industry experience Experience with scripting in Perl ...
... micron technologies and device physics Experience using synthesis & place-route tools Minimum Qualifications Minimum BS and 3+ years of relevant industry experience Experience with scripting in Perl ...
CPU Physical Design Engineer
$184K - $324K/yr
... micron technology, along with its implications to timing, power, and area Excellent communication and interpersonal skills Ability to work independently and/or lead a physical design partition in ...
CPU Physical Design Engineer
$184K - $324K/yr
... micron technology, along with its implications to timing, power, and area Excellent communication and interpersonal skills Ability to work independently and/or lead a physical design partition in ...
CPU Physical Design Engineer
$184K - $324K/yr
... micron technology, along with its implications to timing, power, and area Excellent communication and interpersonal skills Ability to work independently and/or lead a physical design partition in ...
CPU Physical Design Engineer
$184K - $324K/yr
... micron technology, along with its implications to timing, power, and area Excellent communication and interpersonal skills Ability to work independently and/or lead a physical design partition in ...
CPU Physical Design Engineer
$184K - $324K/yr
... micron technology, along with its implications to timing, power, and area Excellent communication and interpersonal skills Ability to work independently and/or lead a physical design partition in ...
CPU Physical Design Engineer
$184K - $324K/yr
... micron technology, along with its implications to timing, power, and area Excellent communication and interpersonal skills Ability to work independently and/or lead a physical design partition in ...
CPU Implementation Engineer
Beaverton, OR · On-site
... micron technologies and device physics Experience using synthesis & place-route tools
CPU Implementation Engineer
Beaverton, OR · On-site
... micron technologies and device physics Experience using synthesis & place-route tools
CPU Implementation Engineer
Beaverton, OR · On-site
... micron technologies and device physics Experience using synthesis & place-route tools
CPU Implementation Engineer
Beaverton, OR · On-site
... micron technologies and device physics Experience using synthesis & place-route tools
SoC Physical Design Engineer, STA/Timing
Beaverton, OR · On-site
$141K - $145K/yr
Familiar with important aspects of timing of large high-performance SoC designs in sub-micron technologies. Proficient in STA and methodologies for timing closure and have a fundamental understanding ...
SoC Physical Design Engineer, STA/Timing
Beaverton, OR · On-site
$141K - $145K/yr
Familiar with important aspects of timing of large high-performance SoC designs in sub-micron technologies. Proficient in STA and methodologies for timing closure and have a fundamental understanding ...
SoC Physical Design Engineer, STA/Timing
Beaverton, OR · On-site
$141K - $145K/yr
Experience with timing of large high-performance SoC designs in sub-micron technologies. Deep understanding of noise, crosstalk, OCV and other timing modeling effects. Knowledge of circuit modeling ...
SoC Physical Design Engineer, STA/Timing
Beaverton, OR · On-site
$141K - $145K/yr
Experience with timing of large high-performance SoC designs in sub-micron technologies. Deep understanding of noise, crosstalk, OCV and other timing modeling effects. Knowledge of circuit modeling ...
SoC Physical Design Engineer, STA/Timing
Beaverton, OR · On-site
$141K - $145K/yr
Preferred Qualifications Familiar with important aspects of timing of large high-performance SoC designs in sub-micron technologies. Experience with STA and methodologies for timing closure. Familiar ...
SoC Physical Design Engineer, STA/Timing
Beaverton, OR · On-site
$141K - $145K/yr
Preferred Qualifications Familiar with important aspects of timing of large high-performance SoC designs in sub-micron technologies. Experience with STA and methodologies for timing closure. Familiar ...
... micron technologies and device physics Experience using synthesis & place-route tools Minimum Qualifications Minimum BS Academic coursework or industry experience in VLSI and/or digital circuit ...
... micron technologies and device physics Experience using synthesis & place-route tools Minimum Qualifications Minimum BS Academic coursework or industry experience in VLSI and/or digital circuit ...
SoC Physical Design Engineer, STA/Timing
$141K - $145K/yr
Preferred Qualifications Familiar with important aspects of timing of large high-performance SoC designs in sub-micron technologies. Experience with STA and methodologies for timing closure. Familiar ...
SoC Physical Design Engineer, STA/Timing
$141K - $145K/yr
Preferred Qualifications Familiar with important aspects of timing of large high-performance SoC designs in sub-micron technologies. Experience with STA and methodologies for timing closure. Familiar ...
SoC Physical Design Engineer, STA/Timing
$141K - $145K/yr
Familiar with important aspects of timing of large high-performance SoC designs in sub-micron technologies. Proficient in STA and methodologies for timing closure and have a fundamental understanding ...
SoC Physical Design Engineer, STA/Timing
$141K - $145K/yr
Familiar with important aspects of timing of large high-performance SoC designs in sub-micron technologies. Proficient in STA and methodologies for timing closure and have a fundamental understanding ...
SoC Physical Design Engineer, STA/Timing
$141K - $145K/yr
Experience with timing of large high-performance SoC designs in sub-micron technologies. Deep understanding of noise, crosstalk, OCV and other timing modeling effects. Knowledge of circuit modeling ...
SoC Physical Design Engineer, STA/Timing
$141K - $145K/yr
Experience with timing of large high-performance SoC designs in sub-micron technologies. Deep understanding of noise, crosstalk, OCV and other timing modeling effects. Knowledge of circuit modeling ...
Micron Technology information
See Oregon salary details
$13.47 - $15.62
5% of jobs
$15.62 - $17.77
14% of jobs
$18.28 is the 25th percentile. Wages below this are outliers.
$17.77 - $19.92
25% of jobs
The median wage is $20.57 / hr.
$19.92 - $22.07
19% of jobs
$22.07 - $24.21
9% of jobs
$24.90 is the 75th percentile. Wages above this are outliers.
$24.21 - $26.36
7% of jobs
$26.36 - $28.51
7% of jobs
$28.51 - $30.66
5% of jobs
$30.66 - $32.81
3% of jobs
$32.81 - $34.96
2% of jobs
$34.96 - $37.11
2% of jobs
$13
$22
$37
How much do micron technology jobs pay per hour?
As of Aug 8, 2026, the average hourly pay for micron technology in Oregon is $22.68, according to ZipRecruiter salary data. Most workers in this role earn between $18.32 and $25.91 per hour, depending on experience, location, and employer.
What are the key skills and qualifications needed to thrive at Micron Technology, and why are they important?
To thrive at Micron Technology, candidates typically need a strong background in engineering, materials science, or computer science, often supported by a relevant degree. Familiarity with semiconductor manufacturing tools, data analysis software, and industry certifications such as Six Sigma are highly valuable. Critical thinking, teamwork, and effective communication help professionals excel in cross-functional and innovative environments. These skills enable employees to contribute to cutting-edge technology development and maintain Micron's competitive edge in the semiconductor industry.
What is Micron Technology?
Micron Technology is a global leader in the semiconductor industry, specializing in the production of memory and storage solutions such as DRAM, NAND, and NOR flash memory. These products are used in a wide range of applications, including computers, mobile devices, automotive systems, and data centers. Founded in 1978 and headquartered in Boise, Idaho, Micron has grown to be one of the largest memory manufacturers in the world, providing essential components that power modern technology. The company is known for its innovation in memory technology and commitment to research and development.
What is the typical team structure and collaboration style at Micron Technology?
At Micron Technology, employees often work in cross-functional teams that may include engineers, product managers, quality assurance specialists, and supply chain professionals. Collaboration is highly encouraged through regular team meetings, project management tools, and open communication channels. Team members are expected to share updates, troubleshoot challenges together, and contribute to shared goals, fostering an environment of innovation and continuous improvement. This collaborative structure not only supports individual growth but also ensures that projects move efficiently from concept to completion.
What is the difference between Micron Technology vs Semiconductor Process Engineer?
| Aspect | Micron Technology | Semiconductor Process Engineer |
|---|---|---|
| Required Credentials | Bachelor's or Master's in Electrical Engineering, Materials Science, or related fields | Bachelor's or Master's in similar engineering disciplines, often with specialized semiconductor coursework |
| Work Environment | Manufacturing facilities, R&D labs, corporate offices | Cleanroom manufacturing environments, R&D labs, production lines |
| Employer & Industry Usage | Major semiconductor manufacturer, producing memory and storage solutions | Roles within semiconductor manufacturing companies, including Micron, focusing on process development and optimization |
Micron Technology and Semiconductor Process Engineers both operate within the semiconductor industry, with overlapping credentials and work environments. While Micron is a leading manufacturer, Semiconductor Process Engineers focus on developing and refining manufacturing processes. The roles are interconnected, with Process Engineers often employed by companies like Micron to improve production efficiency and product quality.
What are popular job titles related to Micron Technology jobs in Oregon? For Micron Technology jobs in Oregon, the most frequently searched job titles are:
What job categories do people searching Micron Technology jobs in Oregon look for? The top searched job categories for Micron Technology jobs in Oregon are:
What cities in Oregon are hiring for Micron Technology jobs? Cities in Oregon with the most Micron Technology job openings:
Apple rating
8.0
Based on 677 frontline employees who took The Breakroom Quiz
7th of 30 rated technology retailers
Job description
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver groundbreaking Apple products!
Apple’s Silicon Engineering Group (SEG) is hiring hardworking engineers for CPU block-level implementation.
Description
• Generate and validate new ideas, create flows and methodologies around them by working with CPU Designers, CAD teams and EDA tool vendors to improve PPA
• Detailed analysis across partitions to understand optimization opportunities
• Cross functional collaboration across STA, library, tech and post silicon teams to improve optimization during Implementation
• Contribute to aspects of Synthesis and Physical Design Implementation methodologies
Preferred Qualifications
Experience implementing high-performance and low-power CPU designs
Scripting skills to interface with tools and analyze data
Experience with SAPR/PNR design flow infrastructure/scripts
Proficiency in programming and scripting (Example: Python, TCL)
Understanding of challenges related to latest deep sub-micron technology and ability to write algorithms and code to extract PPA during Implementation
Strong interpersonal skills and ability to work effectively in a dynamic team environment
Strong understanding and experience using industry standard synthesis, PnR, and STA tools
Excellent debugging and problem-solving skills
Minimum Qualifications
Minimum BS and 3+ years of relevant industry experience
Experience with implementing VLSI digital designs using SAPR tools with multi-GHz performance goals
Experience with logic optimization trade-offs between area, timing and power
Apple’s Silicon Engineering Group (SEG) is hiring hardworking engineers for CPU block-level implementation.
Description
• Generate and validate new ideas, create flows and methodologies around them by working with CPU Designers, CAD teams and EDA tool vendors to improve PPA
• Detailed analysis across partitions to understand optimization opportunities
• Cross functional collaboration across STA, library, tech and post silicon teams to improve optimization during Implementation
• Contribute to aspects of Synthesis and Physical Design Implementation methodologies
Preferred Qualifications
Experience implementing high-performance and low-power CPU designs
Scripting skills to interface with tools and analyze data
Experience with SAPR/PNR design flow infrastructure/scripts
Proficiency in programming and scripting (Example: Python, TCL)
Understanding of challenges related to latest deep sub-micron technology and ability to write algorithms and code to extract PPA during Implementation
Strong interpersonal skills and ability to work effectively in a dynamic team environment
Strong understanding and experience using industry standard synthesis, PnR, and STA tools
Excellent debugging and problem-solving skills
Minimum Qualifications
Minimum BS and 3+ years of relevant industry experience
Experience with implementing VLSI digital designs using SAPR tools with multi-GHz performance goals
Experience with logic optimization trade-offs between area, timing and power
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976