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Mediatek Jobs (NOW HIRING)

MediaTek Research Lab Inc.

Analog Modeling Engineer

Austin, TX · On-site

$128.60 - $217.20/hr

  • Medical

  • Life

  • Retirement

  • PTO

MediaTek is a global fabless semiconductor industry leader, providing solutions from the edge to the cloud and powering over 2 billion connected devices every year. Established in 1997, our leading ...

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MediaTek Research Lab Inc.

Senior D2D Architect

San Jose, CA · On-site

$116 - $287/hr

  • Medical

  • Life

  • Retirement

  • PTO

In addition, MediaTek provides a variety of benefits including comprehensive health insurance coverage, life and disability insurance, savings plan, company‑paid holidays, sick leave, vacation time ...

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Mediatek information

What is MediaTek?

MediaTek is a global semiconductor company based in Taiwan that designs and manufactures chips for wireless communications, high-definition television, handheld mobile devices, navigation systems, consumer multimedia products, and more. The company is well-known for producing affordable and powerful system-on-chip (SoC) solutions that power many smartphones, tablets, smart TVs, and IoT devices worldwide. MediaTek's products help enable advanced features like AI processing, 5G connectivity, and high-quality multimedia experiences in everyday electronics.

What are the key skills and qualifications needed to thrive as a MediaTek engineer?

To thrive as a MediaTek Engineer, you need a solid background in electrical engineering, embedded systems, and programming languages such as C/C++ or Python, typically supported by a relevant degree. Familiarity with SoC design tools, semiconductor testing equipment, and version control systems like Git is commonly required. Strong analytical thinking, problem-solving abilities, and effective teamwork are standout soft skills in this role. These competencies are crucial for developing cutting-edge semiconductor solutions, ensuring product quality, and driving innovation within a fast-paced tech environment.

What are common challenges faced by engineers working at MediaTek, and how can they be addressed?

Engineers at MediaTek often work on fast-paced projects involving advanced semiconductor technologies, which can present challenges such as keeping up with rapid innovation cycles, coordinating with global teams, and troubleshooting complex system-on-chip (SoC) designs. To address these challenges, it's important to stay current with industry trends, actively communicate with cross-functional colleagues, and participate in continuous learning opportunities provided by the company. MediaTek fosters a collaborative environment and encourages engineers to leverage internal resources and mentorship to overcome technical hurdles and grow professionally.

What is the difference between Mediatek vs Chip Designer?

AspectMediatekChip Designer
CredentialsTypically requires a degree in electrical engineering or computer engineeringRequires a degree in electrical engineering, computer engineering, or related fields
Work EnvironmentDesign companies, tech firms, or manufacturing plantsDesign firms, semiconductor companies, or R&D labs
Industry UsageUsed by Mediatek as a company name and brandRefers to professionals involved in designing semiconductor chips

Mediatek is a company specializing in semiconductor solutions, while a Chip Designer is a professional role focused on designing chips, often employed by companies like Mediatek. The two are related but distinct: Mediatek is the employer or brand, and Chip Designer is the job role within the industry.

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Mediatek jobs near you
Infographic showing various Mediatek job openings in the United States as of August 2026, with employment types broken down into 94% Full Time, and 6% Contract. Highlights an 92% Physical, 6% Hybrid, and 2% Remote job distribution.

Compute Subsystem Architect

MediaTek Research Lab Inc.

San Jose, CA • On-site

$211 - $356/hr

Other

Medical, Life, Retirement, PTO

Posted 14 days ago

Job description

MediaTek is seeking a Compute Subsystem Architect to define and build capability in this space ahead of product commitment. The role covers the full Neoverse Compute Subsystem scope: core configuration, CMN topology and parameterization, cache/SLC architecture, and CHI coherency behavior. The role also provides architectural guidance on chiplet and 3D‑IC partitioning trade‑offs, collaborating with dedicated packaging and interconnect teams on interface definitions.

Responsibilities
  • Architect compute subsystems (CPU cluster, L2/L3/SLC cache, coherent mesh fabric) for next‑generation ASIC and advanced Arm computing platform products.
  • Own CMN topology recommendations: mesh dimension, HN‑F/SN‑F/RN‑F placement, SLC distribution, snoop filter policy, and QoS parameters.
  • Build CPU subsystem performance models to quantify many‑core scaling: latency, bandwidth‑per‑core, and mesh congestion under AI‑era workload traffic patterns.
  • Drive technology readiness: track Arm Neoverse CSS/CMN roadmap, identify IP gaps, and lead technical engagement with Arm on architecture and multi‑die scope.
  • Evaluate architectural implications of 3D‑IC and chiplet splits on CMN topology, CHI credit return, and snoop timing; hand off quantified constraints to packaging and physical teams; co‑design while maintaining focus on computing architecture.
  • Align design with potential product landing vehicles including custom ASIC solutions and advanced Arm platforms (including future CPU Dielet configurations).
  • Prepare architecture specifications and technical documents; present trade‑offs to engineering leadership and executives.
Qualifications
  • Deep expertise in Arm CMN‑series coherent mesh networks: topology sizing, HN/SN/RN placement, SLC optimization, QoS. Arm Neoverse CSS experience strongly preferred (required).
  • Proficiency in AMBA CHI protocol: transaction types, snoop behavior, credit flow, and debug mechanisms (required).
  • Experience architecting for many‑core scaling (32+ cores): coherency overhead, cache/fabric co‑optimization, tail‑latency analysis (required).
  • Familiarity with CXL Type‑1/2/3 and server‑class RAS architecture (desired).
  • Excellent communication skills; ability to produce high‑quality architecture documents and present complex trade‑offs to both engineers and executives.
  • Educational background: MS in Electrical Engineering, Computer Engineering, Computer Science.
  • Minimum 10 years of relevant industry experience.
  • Architecture definition and technology readiness for Neoverse CSS‑based compute subsystems: CPU cluster, CMN, cache/SLC, and CHI coherency.
  • Architectural interface ownership for chiplet/3D‑IC configurations; packaging and D2D implementation handled by dedicated functional teams.
  • Opportunity to shape MediaTek’s advanced computing platform strategy and data center CPU roadmap from the ground up.
Compensation & Benefits
  • Salary range: $211,000–$356,000.
  • Employee may be eligible for performance bonus, short and long term incentive programs. Actual total compensation will be dependent upon the individual’s skills, experience and qualifications.
  • MediaTek provides a variety of benefits including comprehensive health insurance coverage, life and disability insurance, savings plan, company paid holidays, sick leave, vacation time, parental leave, 401(k) and more.

MediaTek is an Equal Opportunity Employer that is committed to inclusion and diversity to all, regardless of age, ancestry, color, disability (mental and physical), exercising the right to family care and medical leave, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, religious creed, sex (includes pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation.

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