RFIC Layout Engineer
Austin, TX · On-site
As an RFIC Layout Engineer, you will address intriguing daily layout challenges, collaborate with skilled RFIC design and layout teams, and continuously improve products to surpass previous ...
RFIC Layout Engineer
Austin, TX · On-site
As an RFIC Layout Engineer, you will address intriguing daily layout challenges, collaborate with skilled RFIC design and layout teams, and continuously improve products to surpass previous ...
RFIC Layout Engineer
$134K - $245K/yr
Capability to lead other layout engineers for top-level integration. Scripting skills in PERL or SKILL are a plus. Minimum Qualifications BS and 3+ years of relevant industry experience. Good ...
RFIC Layout Engineer
$134K - $245K/yr
Capability to lead other layout engineers for top-level integration. Scripting skills in PERL or SKILL are a plus. Minimum Qualifications BS and 3+ years of relevant industry experience. Good ...
RFIC Layout Engineer
$42.23 - $75.14/hr
Capability to lead other layout engineers for top-level integration. Scripting skills in PERL or SKILL are a plus. Minimum Qualifications 8+ year minimum related experience required Good ...
RFIC Layout Engineer
$42.23 - $75.14/hr
Capability to lead other layout engineers for top-level integration. Scripting skills in PERL or SKILL are a plus. Minimum Qualifications 8+ year minimum related experience required Good ...
RFIC Layout Engineer
$163K - $290K/yr
Top-level layout integration and verification, schedule management.","responsibilities":"As a RF layout engineer, you will be responsible for: Detailed transistor-level layout of RF and analog ...
RFIC Layout Engineer
$163K - $290K/yr
Top-level layout integration and verification, schedule management.","responsibilities":"As a RF layout engineer, you will be responsible for: Detailed transistor-level layout of RF and analog ...
RFIC Layout Engineer
$42.23 - $75.14/hr
Capability to lead other layout engineers for top-level integration. Scripting skills in PERL or SKILL are a plus. Minimum Qualifications 8+ year minimum related experience required Good ...
RFIC Layout Engineer
$42.23 - $75.14/hr
Capability to lead other layout engineers for top-level integration. Scripting skills in PERL or SKILL are a plus. Minimum Qualifications 8+ year minimum related experience required Good ...
RFIC Layout Engineer
Irvine, CA · On-site
Capability to lead other layout engineers for top-level integration.Scripting skills in PERL or SKILL are a plus.
RFIC Layout Engineer
Irvine, CA · On-site
Capability to lead other layout engineers for top-level integration.Scripting skills in PERL or SKILL are a plus.
RFIC Layout Engineer
Austin, TX · On-site
As an RFIC Layout Engineer, you will address intriguing daily layout challenges, collaborate with skilled RFIC design and layout teams, and continuously improve products to surpass previous ...
RFIC Layout Engineer
Austin, TX · On-site
As an RFIC Layout Engineer, you will address intriguing daily layout challenges, collaborate with skilled RFIC design and layout teams, and continuously improve products to surpass previous ...
RFIC Layout Engineer
$42.23 - $75.14/hr
Capability to lead other layout engineers for top-level integration. Scripting skills in PERL or SKILL are a plus. Minimum Qualifications 8+ year minimum related experience required Good ...
RFIC Layout Engineer
$42.23 - $75.14/hr
Capability to lead other layout engineers for top-level integration. Scripting skills in PERL or SKILL are a plus. Minimum Qualifications 8+ year minimum related experience required Good ...
Sr. Photonic IC Layout Engineer
Temecula, CA · On-site
$125K - $185K/yr
All tasks related to mask design and layout of photonic integrated circuits * Creating mask designs in conjunction with optical designers and process engineers. * Creating design rules and ...
Quick apply
Sr. Photonic IC Layout Engineer
Temecula, CA · On-site
$125K - $185K/yr
All tasks related to mask design and layout of photonic integrated circuits * Creating mask designs in conjunction with optical designers and process engineers. * Creating design rules and ...
Layout Engineer, DEG
Boise, ID · On-site
Our layout engineering team drives the physical design foundations behind Micron's industry-leading memory technologies. We work closely across global design, CAD, and verification groups, solving ...
Layout Engineer, DEG
Boise, ID · On-site
Our layout engineering team drives the physical design foundations behind Micron's industry-leading memory technologies. We work closely across global design, CAD, and verification groups, solving ...
RFIC Layout Engineer
Irvine, CA · On-site
Capability to lead other layout engineers for top-level integration.Scripting skills in PERL or SKILL are a plus.
RFIC Layout Engineer
Irvine, CA · On-site
Capability to lead other layout engineers for top-level integration.Scripting skills in PERL or SKILL are a plus.
RFIC Layout Engineer
Irvine, CA · On-site
Capability to lead other layout engineers for top-level integration.Scripting skills in PERL or SKILL are a plus.
RFIC Layout Engineer
Irvine, CA · On-site
Capability to lead other layout engineers for top-level integration.Scripting skills in PERL or SKILL are a plus.
Sr. Photonic IC Layout Engineer
Temecula, CA · On-site
$125K - $185K/yr
All tasks related to mask design and layout of photonic integrated circuits * Creating mask designs in conjunction with optical designers and process engineers. * Creating design rules and ...
Sr. Photonic IC Layout Engineer
Temecula, CA · On-site
$125K - $185K/yr
All tasks related to mask design and layout of photonic integrated circuits * Creating mask designs in conjunction with optical designers and process engineers. * Creating design rules and ...
Our layout engineering team drives the physical design foundations behind Micron's industryleading memory technologies. We work closely across global design, CAD, and verification groups, solving ...
Our layout engineering team drives the physical design foundations behind Micron's industryleading memory technologies. We work closely across global design, CAD, and verification groups, solving ...
RFIC Layout Engineer
$115K - $203K/yr
As an RFIC Layout Engineer, you will address intriguing daily layout challenges, collaborate with skilled RFIC design and layout teams, and continuously improve products to surpass previous ...
RFIC Layout Engineer
$115K - $203K/yr
As an RFIC Layout Engineer, you will address intriguing daily layout challenges, collaborate with skilled RFIC design and layout teams, and continuously improve products to surpass previous ...
RFIC Layout Engineer
$115K - $203K/yr
As an RFIC Layout Engineer, you will address intriguing daily layout challenges, collaborate with skilled RFIC design and layout teams, and continuously improve products to surpass previous ...
RFIC Layout Engineer
$115K - $203K/yr
As an RFIC Layout Engineer, you will address intriguing daily layout challenges, collaborate with skilled RFIC design and layout teams, and continuously improve products to surpass previous ...
RFIC Layout Engineer
$163K - $290K/yr
As an RFIC Layout Engineer, you will address intriguing daily layout challenges, collaborate with skilled RFIC design and layout teams, and continuously improve products to surpass previous ...
RFIC Layout Engineer
$163K - $290K/yr
As an RFIC Layout Engineer, you will address intriguing daily layout challenges, collaborate with skilled RFIC design and layout teams, and continuously improve products to surpass previous ...
RFIC Layout Engineer
Austin, TX · On-site
$115K - $203K/yr
As an RFIC Layout Engineer, you will address intriguing daily layout challenges, collaborate with skilled RFIC design and layout teams, and continuously improve products to surpass previous ...
RFIC Layout Engineer
Austin, TX · On-site
$115K - $203K/yr
As an RFIC Layout Engineer, you will address intriguing daily layout challenges, collaborate with skilled RFIC design and layout teams, and continuously improve products to surpass previous ...
We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse individuals responsible for handling meaningful high-speed mixed-signal ...
We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse individuals responsible for handling meaningful high-speed mixed-signal ...
Analog IC Layout Engineer
Fremont, CA · On-site
$83K - $139K/yr
As an Analog IC Layout Engineer, your responsibilities will include: * Crafting state-of-the-art ... Physical verification of custom IC mask layouts (LVS, DRC, ERC) Required Qualifications: * 2+ years ...
Analog IC Layout Engineer
Fremont, CA · On-site
$83K - $139K/yr
As an Analog IC Layout Engineer, your responsibilities will include: * Crafting state-of-the-art ... Physical verification of custom IC mask layouts (LVS, DRC, ERC) Required Qualifications: * 2+ years ...
Mask Layout Engineer information
See salary details
$45K - $57.8K
4% of jobs
$57.8K - $70.5K
2% of jobs
$70.5K - $83.3K
12% of jobs
$93.7K is the 25th percentile. Wages below this are outliers.
$83.3K - $96.1K
9% of jobs
$96.1K - $108.9K
11% of jobs
The median wage is $120.7K / yr.
$108.9K - $121.6K
14% of jobs
$121.6K - $134.4K
22% of jobs
$136.8K is the 75th percentile. Wages above this are outliers.
$134.4K - $147.2K
9% of jobs
$147.2K - $160K
9% of jobs
$160K - $172.7K
3% of jobs
$172.7K - $185.5K
6% of jobs
$45K
$120.8K
$185.5K
How much do mask layout engineer jobs pay per year?
As of Jun 22, 2026, the average yearly pay for mask layout engineer in the United States is $120,849.00, according to ZipRecruiter salary data. Most workers in this role earn between $90,000.00 and $144,000.00 per year, depending on experience, location, and employer.
What are the key skills and qualifications needed to thrive in the Mask Layout Engineer position, and why are they important?
A Mask Layout Engineer needs a solid background in semiconductor physics, microelectronics, and integrated circuit (IC) design, often supported by a relevant engineering degree. Proficiency with Electronic Design Automation (EDA) tools such as Cadence Virtuoso, Mentor Graphics, or Synopsys is typically required, and familiarity with industry standards like DRC/LVS checking is valuable. Strong attention to detail, problem-solving skills, and clear communication are important soft skills for collaborating with design and verification teams. These competencies are essential to ensure accurate, reliable IC layouts that meet stringent design and manufacturing specifications.
What is a Mask Layout Engineer job?
A Mask Layout Engineer is responsible for designing the physical layout of integrated circuits (ICs) based on schematic designs. They ensure that the layout meets design specifications, electrical performance criteria, and manufacturability constraints. This involves working with design rules, placement, routing, and verification tools to optimize performance and minimize errors. Mask Layout Engineers collaborate closely with circuit design teams, process engineers, and foundry teams to ensure that the final design can be successfully fabricated. Their work is critical in semiconductor manufacturing, impacting chip performance, size, and power efficiency.
What does a typical day look like for a Mask Layout Engineer?
A typical day for a Mask Layout Engineer involves translating circuit schematics into precise physical layouts using specialized software, running design rule checks (DRC) and layout versus schematic (LVS) verifications, and collaborating closely with circuit designers to resolve any issues or challenges. You’ll spend a significant portion of your time ensuring that layouts meet manufacturing process constraints and optimizing for performance and manufacturability. Mask Layout Engineers often work as part of a larger IC design team, interacting regularly with other engineers, project managers, and sometimes foundry partners. This role offers opportunities to deepen your technical skills and advance towards senior layout, design, or project leadership positions over time.
More about Mask Layout Engineer jobs
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What states have the most Mask Layout Engineer jobs? States with the most job openings for Mask Layout Engineer jobs include:
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Apple rating
8.1
Based on 662 frontline employees who took The Breakroom Quiz
6th of 30 rated technology retailers
Job description
Are you passionate about advancing the boundaries of RF analog circuit integration in advanced technology nodes for wireless transceivers? Do you thrive on innovation and improving RF layout methodologies? As an RFIC Layout Engineer, you will address intriguing daily layout challenges, collaborate with skilled RFIC design and layout teams, and continuously improve products to surpass previous iterations and enrich user experiences worldwide.
You will lay out detailed custom blocks, including floorplanning, placement, routing, and verification for high-frequency RF circuits, verifying and refining layouts through simulation to meet design requirements. You will diagnose sophisticated verification (DRC/LVS) and PDK issues using Cadence and Calibre. Collaboration with engineering design and layout teams will be meaningful to understand design concepts, constraints, and opportunities for improvement. Upon identifying challenges, you will propose solutions to streamline layout tasks, collaborating with teams to specify and finalize methodologies.
BS with 10+ years of industry experience.Deep knowledge of sub-micron CMOS technologies (16nm, 7nm, and beyond) and proficiency with FinFET structures, guard-rings, deep N-wells, and PN junctions are required.Familiarity with sophisticated process effects such as LOD, WPE, and DFM is critical.Understanding trade-offs involving matching, parasitic effects, high-frequency routing, isolation, coupling, shielding, RC delay, EM, IR, ESD, and latch-up is vital.
Experience in sophisticated DRC, ERC, LVS verification, and debugging.Prior experience in crafting custom layouts at the chip, block, and device levels, particularly for RF high-frequency circuits such as LNAs, mixers, VCOs, and PLLs is a plus.RF experience is helpful.
You will lay out detailed custom blocks, including floorplanning, placement, routing, and verification for high-frequency RF circuits, verifying and refining layouts through simulation to meet design requirements. You will diagnose sophisticated verification (DRC/LVS) and PDK issues using Cadence and Calibre. Collaboration with engineering design and layout teams will be meaningful to understand design concepts, constraints, and opportunities for improvement. Upon identifying challenges, you will propose solutions to streamline layout tasks, collaborating with teams to specify and finalize methodologies.
BS with 10+ years of industry experience.Deep knowledge of sub-micron CMOS technologies (16nm, 7nm, and beyond) and proficiency with FinFET structures, guard-rings, deep N-wells, and PN junctions are required.Familiarity with sophisticated process effects such as LOD, WPE, and DFM is critical.Understanding trade-offs involving matching, parasitic effects, high-frequency routing, isolation, coupling, shielding, RC delay, EM, IR, ESD, and latch-up is vital.
Experience in sophisticated DRC, ERC, LVS verification, and debugging.Prior experience in crafting custom layouts at the chip, block, and device levels, particularly for RF high-frequency circuits such as LNAs, mixers, VCOs, and PLLs is a plus.RF experience is helpful.
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976