ZipRecruiter

Log In

1

Junior Rtl Design Engineer Jobs in Washington (NOW HIRING)

Lynk

Senior FPGA Design Engineer

Chantilly, VA · On-site

As a Senior FPGA Engineer, you will support the development of custom radio platforms for the ... Design high-speed FPGA RTL designs for satellite communication systems * Understand the hardware ...

Alpha Corporation

Roadway Design Engineer

Halethorpe, MD · On-site

$75.70K - $93.30K/yr

Collaborate with multidisciplinary teams including drainage, structures, traffic, and utilities. * Assist in mentoring or supporting junior engineers and interns on roadway design tools and DOT ...

Alpha Corporation

Roadway Design Engineer

Sterling, VA · On-site

$78.30K - $96.40K/yr

Collaborate with multidisciplinary teams including drainage, structures, traffic, and utilities. * Assist in mentoring or supporting junior engineers and interns on roadway design tools and DOT ...

Alpha

Roadway Design Engineer

Dulles, VA

$76.70K - $94.50K/yr

Collaborate with multidisciplinary teams including drainage, structures, traffic, and utilities. * Assist in mentoring or supporting junior engineers and interns on roadway design tools and DOT ...

Leidos

FPGA Firmware Design Engineer

Arlington, VA

... engineers, scientists, etc) to design, develop, simulate, and integrate challenging DSP FPGA ... RTL and incorporate client feedback into firmware revisions. This role will also support ...

GFT.

Linear (Pipeline) Design Engineer

Fairfax, VA

$75K - $150K/yr

Supervise and support the work of others and mentor junior level engineers & design/drafting technical staff. What you will bring to our firm: * Bachelor's Degree in Civil, Environmental, Mechanical ...

Next Step Systems

FPGA Engineer

Linthicum, MD · On-site

$128.30K - $164.90K/yr

... design within ASIC/FPGA, create specification documents. - Develop RTL designs using SystemVerilog, with emphasis on DSP and digital communication system blocks (frontend, physical layer, link layer ...

Leidos

FPGA Firmware Design Engineer

Arlington, VA · On-site

... engineers, scientists, etc) to design, develop, simulate, and integrate challenging DSP FPGA ... RTL and incorporate client feedback into firmware revisions. This role will also support ...

next page

Showing results 1-20

People also search for

All JobsJunior Rtl Design Engineer JobsJunior Rtl Design Engineer Jobs in Washington

Junior Rtl Design Engineer information

See Washington salary details

$37.9K

$81.3K

$124K

How much do junior rtl design engineer jobs pay per year?

As of May 31, 2026, the average yearly pay for junior rtl design engineer in Washington is $81,320.00, according to ZipRecruiter salary data. Most workers in this role earn between $54,900.00 and $90,600.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Junior RTL Design Engineer, and why are they important?

To thrive as a Junior RTL Design Engineer, a solid background in digital logic design, hardware description languages (such as Verilog or VHDL), and a relevant engineering degree are essential. Experience with simulation and synthesis tools (like ModelSim, Synopsys, or Xilinx Vivado) and a basic understanding of ASIC or FPGA flows are typically required. Strong analytical thinking, attention to detail, and effective teamwork skills help individuals excel in translating specifications into efficient hardware designs. These skills ensure accurate, reliable, and high-performance digital circuit development, which is crucial for meeting project goals and industry standards.

What are some common challenges faced by Junior RTL Design Engineers when transitioning from academic projects to industry roles?

Junior RTL Design Engineers often find the transition from academic projects to industry roles challenging due to the increased complexity and scale of commercial designs. In industry, there is a strong emphasis on meeting strict timing, power, and area requirements, as well as adhering to rigorous verification and documentation standards. Collaboration with verification, physical design, and software teams is essential, and juniors may need to quickly adapt to using industry-standard EDA tools and workflows. Gaining proficiency in debugging and understanding legacy codebases are also typical hurdles. However, most teams provide mentorship and structured onboarding to help new engineers succeed.

What are Junior RTL Design Engineers?

Junior RTL Design Engineers are entry-level professionals who work on designing and verifying the Register Transfer Level (RTL) logic for digital integrated circuits. They typically use hardware description languages like Verilog or VHDL to describe and simulate the functionality of hardware blocks according to specifications. Their responsibilities often include coding, simulation, debugging, and collaborating with senior engineers to ensure the design meets performance and functional requirements. This role is crucial in the process of creating chips and digital systems used in various electronic devices.

What is the difference between Junior Rtl Design Engineer vs Digital Design Engineer?

AspectJunior Rtl Design EngineerDigital Design Engineer
Required CredentialsBachelor's in Electrical Engineering or related field; some certificationsBachelor's or higher in Electrical/Electronic Engineering; certifications vary
Work EnvironmentDesign teams in semiconductor or electronics companiesDesign and development teams in similar industries
Employer & Industry UsageCommonly employed in chip design, FPGA, ASIC developmentUsed in digital circuit and system design across industries

Both roles involve digital circuit design, but Junior Rtl Design Engineers focus more on RTL coding and verification, while Digital Design Engineers may handle broader digital system development. The roles often overlap in skills and work environment, with the main difference being scope and experience level.

What are popular job titles related to Junior Rtl Design Engineer jobs in Washington? For Junior Rtl Design Engineer jobs in Washington, the most frequently searched job titles are:
What job categories do people searching Junior Rtl Design Engineer jobs in Washington look for? The top searched job categories for Junior Rtl Design Engineer jobs in Washington are:
What cities in Washington are hiring for Junior Rtl Design Engineer jobs? Cities in Washington with the most Junior Rtl Design Engineer job openings:
Junior Rtl Design Engineer jobs near you
Infographic showing various Junior Rtl Design Engineer job openings in Washington as of May 2026, with employment types broken down into 88% Full Time, 8% Part Time, and 4% Contract. Highlights an 92% Physical, 5% Hybrid, and 3% Remote job distribution, with an average salary of $81,320 per year, or $39.1 per hour.
Senior FPGA Design Engineer

Senior FPGA Design Engineer

Lynk

Chantilly, VA • On-site

Full-time

Posted 5 days ago

Job description

About Lynk
Lynk is the inventor of satellite direct to device or D2D technology, and has the world's only commercial license from the FCC to operate a commercial D2D system. Today, Lynk allows mobile network operators' subscribers to send and receive text messages to and from space via standard unmodified, mobile devices. Lynk's service has been tested and proven on all seven continents, has regulatory approvals in more than 30 countries, and is currently being deployed commercially based on more than 40 MNO commercial service contracts covering approximately 50 countries.
Our technology will enable all 8 billion people on the planet to stay connected with the existing standard phone in their pocket. Everywhere. No matter what.
By joining Lynk, you will have the opportunity to directly touch the lives of billions. Your mission will be to bring mobile broadband to billions, pull hundreds of millions out of poverty, and save countless lives.
Job Summary
Lynk is developing cellular-based space payloads and seeks engineers with expertise and experience designing and developing custom software-defined radio (SDR) platforms. Aspects of the position require an understanding of FPGA hardware, firmware, digital signal processing, and algorithms for SDR-based satellite communication.
As a Senior FPGA Engineer, you will support the development of custom radio platforms for the primary (cellular service link) and secondary (TT&C / feeder link) communication links. The platform will initially be tested in a lab environment, then on the payload prototype in a lab environment that simulates orbit operations, and finally in space. The Senior FPGA Engineer will also be responsible for designing and implementing methods for ensuring successful testing, verification, and validation.
Core Responsibilities
As a Senior FPGA Engineer, your core responsibilities are as follows:
  • Design high-speed FPGA RTL designs for satellite communication systems
  • Understand the hardware-based requirements, e.g., FPGA size, speed, clock stability, I/O interfaces, sample rates, dynamic range, and radio chip architecture.
  • Design and evaluate digital signal processing (DSP) algorithms for FPGA.
  • Update or create host interface software to interact with FPGAs.
  • Implement device driver software in C, C++, or other languages for a Linux environment.
  • Test and validate hardware blocks both in simulation and on target.
  • Develop and maintain documentation and ICDs for in-house IP blocks and other related components.

Qualifications
  • A Bachelor's degree (or higher) in Electrical Engineering, Computer Engineering, or related field.
  • At least three years of recent experience working with Xilinx/Altera FPGAs.
  • Experience with high-speed interfaces such as JESD204C and PCI Express.
  • Experience with RFICs such as Analog Devices AD9371.
  • Experience with Linux device drivers.
  • Ability to create test benches for system validation and benchmarking.
  • Experience using lab equipment for testing and validation.
  • Experience with evaluating SDR platforms and specifications.
  • Experience with SoC designs such as Xilinx Zynq and Xilinx Versal (preferably with AI Engine) is a plus.
  • Knowledge of PHY and MAC layers of cellular standards (e.g., GSM, LTE, 5G) is a plus.

Job Location
Chantilly, VA

Apply