QPU Design Engineer
$126.80K - $240.60K/yr
At least 3 years of industry experience leading complex chip design and in IC layout. * A degree in engineering, electronics or science, or equivalent industry experience in a technical or scientific ...
$126.80K - $240.60K/yr
At least 3 years of industry experience leading complex chip design and in IC layout. * A degree in engineering, electronics or science, or equivalent industry experience in a technical or scientific ...
$126.80K - $240.60K/yr
At least 3 years of industry experience leading complex chip design and in IC layout. * A degree in engineering, electronics or science, or equivalent industry experience in a technical or scientific ...
Bothell, WA · On-site
$126.80K - $240.60K/yr
At least 3 years of industry experience leading complex chip design and in IC layout. * A degree in engineering, electronics or science, or equivalent industry experience in a technical or scientific ...
Quick apply
Bothell, WA · On-site
$126.80K - $240.60K/yr
At least 3 years of industry experience leading complex chip design and in IC layout. * A degree in engineering, electronics or science, or equivalent industry experience in a technical or scientific ...
Bothell, WA · On-site
$126.80K - $240.60K/yr
At least 3 years of industry experience leading complex chip design and in IC layout. * A degree in engineering, electronics or science, or equivalent industry experience in a technical or scientific ...
Bothell, WA · On-site
$126.80K - $240.60K/yr
At least 3 years of industry experience leading complex chip design and in IC layout. * A degree in engineering, electronics or science, or equivalent industry experience in a technical or scientific ...
$115K - $145K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the ... engineer to determine pad locations * Accurately estimate the schedule for the layout work and ...
$115K - $145K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the ... engineer to determine pad locations * Accurately estimate the schedule for the layout work and ...
$135K - $195K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the ... engineer to determine pad locations * Accurately estimate the schedule for the layout work and ...
$135K - $195K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the ... engineer to determine pad locations * Accurately estimate the schedule for the layout work and ...
Redmond, WA · On-site
$115K - $145K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the ... engineer to determine pad locations * Accurately estimate the schedule for the layout work and ...
Redmond, WA · On-site
$115K - $145K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the ... engineer to determine pad locations * Accurately estimate the schedule for the layout work and ...
Redmond, WA · On-site
$135K - $195K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the ... engineer to determine pad locations * Accurately estimate the schedule for the layout work and ...
Redmond, WA · On-site
$135K - $195K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the ... engineer to determine pad locations * Accurately estimate the schedule for the layout work and ...
$130K - $160K/yr
You will be part of the Encore Semi design and circuit layout team, creating next generation ... Working with IC designers and chip leads to determine the chip and block floorplan, including ...
$130K - $160K/yr
You will be part of the Encore Semi design and circuit layout team, creating next generation ... Working with IC designers and chip leads to determine the chip and block floorplan, including ...
Redmond, WA · On-site
$130K - $160K/yr
You will be part of the Encore Semi design and circuit layout team, creating next generation ... Working with IC designers and chip leads to determine the chip and block floorplan, including ...
Quick apply
Redmond, WA · On-site
$130K - $160K/yr
You will be part of the Encore Semi design and circuit layout team, creating next generation ... Working with IC designers and chip leads to determine the chip and block floorplan, including ...
Redmond, WA · On-site
$130K - $160K/yr
You will be part of the Encore Semi design and circuit layout team, creating next generation ... Working with IC designers and chip leads to determine the chip and block floorplan, including ...
Redmond, WA · On-site
$130K - $160K/yr
You will be part of the Encore Semi design and circuit layout team, creating next generation ... Working with IC designers and chip leads to determine the chip and block floorplan, including ...
You'll join a diverse team of engineers, supply chain specialists, and operations managers ... layout drawings and floor plans for global work orders across Edge, COLO, Leased, and Owned data ...
You'll join a diverse team of engineers, supply chain specialists, and operations managers ... layout drawings and floor plans for global work orders across Edge, COLO, Leased, and Owned data ...
You will partner directly with Colocation Regional Engineering, Capacity Delivery Planning ... teams to ensure rack layout designs never become a bottleneck to capacity delivery. AWS ...
You will partner directly with Colocation Regional Engineering, Capacity Delivery Planning ... teams to ensure rack layout designs never become a bottleneck to capacity delivery. AWS ...
You will partner directly with Colocation Regional Engineering, Capacity Delivery Planning ... teams to ensure rack layout designs never become a bottleneck to capacity delivery. AWS ...
You will partner directly with Colocation Regional Engineering, Capacity Delivery Planning ... teams to ensure rack layout designs never become a bottleneck to capacity delivery. AWS ...
$145K - $175K/yr
RFIC DESIGN ENGINEER (RFIC ENGINEERING) At SpaceX we're leveraging our experience in building ... Perform IC floor planning and layout * Model package and external parasitic components * Evaluate ...
$145K - $175K/yr
RFIC DESIGN ENGINEER (RFIC ENGINEERING) At SpaceX we're leveraging our experience in building ... Perform IC floor planning and layout * Model package and external parasitic components * Evaluate ...
Kirkland, WA · On-site
$140K - $160K/yr
... layout techniques. * Understand ESD, latch-up, and reliability. * Understand general IC ... Design experience. * Solid understanding of circuit fundamental. * Good verbal and written skills.
Kirkland, WA · On-site
$140K - $160K/yr
... layout techniques. * Understand ESD, latch-up, and reliability. * Understand general IC ... Design experience. * Solid understanding of circuit fundamental. * Good verbal and written skills.
Kirkland, WA · On-site
$140K - $160K/yr
... layout techniques. * Understand ESD, latch-up, and reliability. * Understand general IC ... Design experience. * Solid understanding of circuit fundamental. * Good verbal and written skills.
Kirkland, WA · On-site
$140K - $160K/yr
... layout techniques. * Understand ESD, latch-up, and reliability. * Understand general IC ... Design experience. * Solid understanding of circuit fundamental. * Good verbal and written skills.
$140K - $180K/yr
... layout techniques. * Understand ESD, latch-up, and reliability. * Understand general IC ... Design experience. * Solid understanding of circuit fundamental. * Good verbal and written skills.
$140K - $180K/yr
... layout techniques. * Understand ESD, latch-up, and reliability. * Understand general IC ... Design experience. * Solid understanding of circuit fundamental. * Good verbal and written skills.
Redmond, WA · On-site
$145K - $175K/yr
RFIC DESIGN ENGINEER (RFIC ENGINEERING) At SpaceX we're leveraging our experience in building ... Perform IC floor planning and layout * Model package and external parasitic components * Evaluate ...
Redmond, WA · On-site
$145K - $175K/yr
RFIC DESIGN ENGINEER (RFIC ENGINEERING) At SpaceX we're leveraging our experience in building ... Perform IC floor planning and layout * Model package and external parasitic components * Evaluate ...
$115K - $145K/yr
Your work will include everything from system design and schematic capture to PCB layout oversight ... internships/co-ops can apply) PREFERRED SKILLS AND EXPERIENCE: * Master's degree in electrical ...
$115K - $145K/yr
Your work will include everything from system design and schematic capture to PCB layout oversight ... internships/co-ops can apply) PREFERRED SKILLS AND EXPERIENCE: * Master's degree in electrical ...
$160K - $225K/yr
SR. RFIC DESIGN ENGINEER (RFIC ENGINEERING) At SpaceX we're leveraging our experience in building ... Perform IC floor planning and layout * Model package and external parasitic components * Evaluate ...
$160K - $225K/yr
SR. RFIC DESIGN ENGINEER (RFIC ENGINEERING) At SpaceX we're leveraging our experience in building ... Perform IC floor planning and layout * Model package and external parasitic components * Evaluate ...
$7.52 - $9.23
2% of jobs
$9.23 - $10.94
3% of jobs
$10.94 - $12.65
2% of jobs
$12.65 - $14.36
3% of jobs
$14.36 - $16.07
8% of jobs
$16.40 is the 25th percentile. Wages below this are outliers.
$16.07 - $17.78
32% of jobs
$17.78 - $19.49
15% of jobs
$20.93 is the 75th percentile. Wages above this are outliers.
$19.49 - $21.20
12% of jobs
$21.20 - $22.91
15% of jobs
$22.91 - $24.63
7% of jobs
$24.63 - $26.34
1% of jobs
$7
$18
$26
| Aspect | Internship IC Layout Design Engineer | IC Design Engineer |
|---|---|---|
| Credentials | Typically pursuing or recently completed relevant degree; internship experience | Bachelor's or Master's in Electrical/Electronic Engineering; professional experience preferred |
| Work Environment | Internship programs, entry-level tasks, supervised environment | Full-time professional role, independent project work, team collaboration |
| Responsibilities | Assisting in layout design, learning design tools, supporting senior engineers | Designing, simulating, and verifying integrated circuit layouts independently |
In summary, an Internship IC Layout Design Engineer is a trainee gaining hands-on experience under supervision, while an IC Design Engineer is a full-time professional responsible for designing and verifying integrated circuits independently.
$126.80K - $240.60K/yr
Full-time
Medical, Dental, PTO
Posted 22 days ago
Quantum is now, and it's built here.
Oxford Ionics, now part of IonQ, is pioneering the next generation of quantum computing. Using our world-leading trapped-ion technology, we're building the most powerful, accurate and reliable quantum systems to tackle problems that today's supercomputers cannot solve.
Joining Oxford Ionics means becoming part of a global IonQ team that is transforming the future of quantum technology - faster, at scale, and with real world impact.
What to expect:
We are looking for a QPU Design Engineer to join our Processor Design team at Oxford Ionics/IonQ. In this role, you will be responsible for integrating all the features required for the successful operation of our quantum computers into complex chips. You will be directly contributing to the team's mission of advancing the design of high-performance quantum processing units, the novel technology that sits at the very heart of our quantum computers. You will work closely with scientists and fabrication engineers, understanding how the various parts of a chip influence and constrain each other, to bring new designs for ion trapping chips into production.
You will play an important part in shaping the hardware that supports our work in building the world's most advanced quantum systems.
What you'll be responsible for:
In this position, your primary responsibility will focus on turning operational requirements into chip layout, supporting the effective delivery of devices that enable the use of new technologies. You will have the opportunity to expand the range of features supported by our chips, contributing directly to the success of building utility-scale quantum computers.
Key responsibilities include:Â
Requirements
To be successful in this role, you will need prior hands-on experience in chip layout, specifically translating design requirements into feature, as well as taking on layout work. We are looking for someone who can work cross-functionally to define various aspects of chip design, contributing effectively within a fast moving, highly technical team. You will need to be able to take charge of projects independently, solve problems along the way and drive the design process while taking responsibility for delivery of the final tape-out.
You'd be a great fit with:
Additional experience that may be beneficial includes experience in scripted generation of layout (GSDFactory in Python or similar), using Cadence for IC layout, and experience in ion trap and/or photonics design or IC packaging.
Benefits
Be part of a team that's shaping the future of quantum. We offer more than just a role, you'll join a world class community of scientists, engineers and innovators working to unlock the full potential of quantum computing.
We offer a range of benefits, including opportunities to further your career alongside industry leaders, a competitive salary with IonQ stock options, an annual performance bonus, generous annual leave, flexible hybrid working, private medical and dental insurance for you and your family, and much more.
Join us and be part of the future of quantum computing.
We're proud to be an equal opportunity employer and welcome applicants from all backgrounds.
US Salary Bandings:
$126,800 - $240,600