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Internship Hpc Engineer Jobs in Phoenix, AZ (NOW HIRING)

DCG Engineering Finance Analyst

Phoenix, AZ ยท On-site

$73.82K - $96.10K/yr

... and HPC environments. Our DCAI offerings are designed to support key workloads such as AI ... Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or ...

... HPC), Artificial Intelligence (AI) and networking solutions. Many of the new designs require multi ... What You Can Expect As an Advanced Packaging Design engineer, responsibilities include ...

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Internship Hpc Engineer information

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How much do internship hpc engineer jobs pay per hour?

As of May 28, 2026, the average hourly pay for internship hpc engineer in Phoenix, AZ is $19.18, according to ZipRecruiter salary data. Most workers in this role earn between $16.01 and $20.77 per hour, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as an Internship HPC Engineer, and why are they important?

To thrive as an Internship HPC Engineer, you typically need a background in computer science, engineering, or a related field, with strong programming skills in languages like C, C++, or Python. Familiarity with Linux environments, parallel computing frameworks (such as MPI or OpenMP), and common HPC job schedulers is highly beneficial. Strong problem-solving abilities, teamwork, and effective communication help interns excel in collaborative, research-driven environments. These skills and qualities are crucial for contributing to complex computational projects and ensuring efficient use of high-performance computing resources.

What types of projects and technologies will I typically work with as an HPC Engineer intern?

As an HPC Engineer intern, you can expect to work on projects involving the setup, maintenance, and optimization of high-performance computing clusters. Daily tasks may include configuring networking, managing job schedulers, optimizing code for parallel processing, and troubleshooting hardware or software issues. You'll often collaborate with researchers, software developers, and IT staff to ensure systems run efficiently and meet user needs. This internship provides hands-on experience with technologies like Linux, MPI, Slurm, and various compilers, offering valuable exposure to both hardware and software aspects of supercomputing environments.

What are Internship HPC Engineers?

Internship HPC (High Performance Computing) Engineers are students or recent graduates who assist in designing, optimizing, and maintaining advanced computing systems used for complex tasks such as scientific simulations, data analysis, and machine learning. These interns often work with supercomputers, clusters, and parallel processing software to support research and engineering applications. Their responsibilities may include coding, troubleshooting hardware or software, and collaborating with more experienced HPC engineers. An HPC internship provides hands-on experience in a rapidly growing technology field and can lead to full-time roles in research, academia, or industry.

Which is the highest paid internship?

The highest paid internships are typically in fields like technology, finance, and engineering, including roles such as HPC (High-Performance Computing) Engineer internships. These internships often offer competitive stipends or salaries, especially at large tech companies or organizations with specialized technical needs. Compensation varies by industry, location, and company size, but technical internships in high-demand areas tend to be among the top paid.

What is the difference between Internship Hpc Engineer vs Hpc Engineer?

AspectInternship Hpc EngineerHpc Engineer
CredentialsTypically pursuing or recently completed relevant degreeBachelor's or Master's in Computer Science, Engineering, or related field
Work EnvironmentInternship programs, entry-level projects, supervised tasksFull-time professional setting, independent project management
Industry UsageTraining and skill development in high-performance computingDesign, optimize, and maintain HPC systems in industry or research

The main difference is that an Internship Hpc Engineer is a trainee or entry-level position focused on learning and gaining experience, while an Hpc Engineer is a full-time professional responsible for managing HPC systems. Internships serve as a stepping stone toward a full career as an Hpc Engineer, with the latter requiring more experience and expertise.

What are the most commonly searched types of Hpc Engineer jobs in Phoenix, AZ? The most popular types of Hpc Engineer jobs in Phoenix, AZ are:
Principal Engineer- Advanced Packaging Technology Development

Principal Engineer- Advanced Packaging Technology Development

Marvell

Chandler, AZ โ€ข On-site

Full-time

Life, Retirement

Posted 28 days ago


Job description

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

The Advanced Packaging Technology Development (TD) team is responsible for developing, integrating, and maturing advanced packaging technologies to enable next-generation High Performance Computing (HPC), Artificial Intelligence (AI), and networking products. This role focuses on bringing emerging packaging technologies to production readiness, ensuring they meet system-level electrical, mechanical, thermal, and reliability requirements.
The TD team works at the intersection of design, materials, and manufacturing to translate architectural requirements into manufacturable and scalable package solutions, including 2.5D/3D integration, chiplet-based architectures, co-packaged optics (CPO), and advanced substrates. The role requires strong collaboration with internal design teams and external ecosystem partners to close technology gaps, optimize integration, and enable high-volume manufacturing (HVM).

What You Can Expect

  • Technology Development & Integration
    • Develop and mature advanced packaging technologies from concept to production-ready solutions.
    • Drive integration of new technologies into product platforms, ensuring alignment with system requirements and manufacturing constraints.
  • Architecture Implementation & Co-Design
    • Define and implement package architectures including chiplet topology, interconnect strategy, interposer/substrate design, and power delivery networks.
    • Lead co-design across silicon, package, and system to optimize performance, power, and area.
  • Design Rules, Methodology & Scaling
    • Establish and refine design rules, stack-ups, and integration guidelines for advanced packaging technologies.
    • Drive scaling of interconnect density, substrate capability, and PDN performance.
  • Manufacturability & Ecosystem Alignment
    • Work closely with OSATs, foundries, and substrate suppliers to ensure process capability, yield, and cost targets are met.
    • Drive resolution of manufacturability challenges and ensure smooth ramp to HVM.
  • Prototype Development & Qualification
    • Lead development of test vehicles and engineering builds to validate technology readiness.
    • Drive package qualification, reliability validation, and failure analysis.
  • Program Leadership
    • Lead cross-functional efforts across design, product engineering, and supply chain to ensure successful technology deployment.
    • Influence supplier roadmaps to align with product and technology needs.

What We're Looking For

Deep expertise in advanced packaging technologies, including:

  • 2.5D/3D integration, chiplets, interposers, and advanced substrates

  • Materials, process integration, and manufacturability

  • Reliability (component and board level), warpage, and thermal management

Strong foundation in electrical engineering including:

  • Signal integrity (SI), power integrity (PI), and electromagnetic behavior

  • Experience with high-speed interfaces and complex PDNs

  • Proven experience in technology development and productization, not just design or research

  • Bachelor's degree with 10+ years of experience, or Master's / PhD with 8+ years of experience in relevant fields

Expected Base Pay Range (USD)

168,400 - 249,310, $ per annum

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life's most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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