Internship Digital Logic Design Jobs in Ohio (NOW HIRING)

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Job Title: Specialist, FPGA/ASIC Hardware Engineer, Electrical Engineering

Job Code: 41606

Job Location: Cincinnati, Ohio

Job Schedule: 4/10

Job Description:

As a Hardware Engineer at L3Harris you will be responsible for architecture, design and development of next generation Electronic Safe and Arm Devices utilizing the latest state of the art technologies.The ideal candidate for this role would share our passion for creating and innovating newtechnologies in a highly dynamic, fast-paced environment. We are looking for highly talented, motivated, and versatile engineers that can create the next generation fuzing solutions.

ASIC / FPGA designs will include various sensor interfaces, sequence verification, A/D and D/A interfaces, communication protocols, state machines, timer chains, etc. used in Electronic Safe and Arm Devices (Fuzes) for DOD weapon systems. Microsemi / Actel is our targeted FPGA and QuestaSim is our simulation tool. The primary responsibilities will focus on Verilog FPGA design, System Verilog UVM verification and C# based microcontroller development.

Essential Functions:

• Analysis of the requirements, architecture definition, design and debug of FPGA and associated hardware and microcontroller products and associated firmware.
• Developing Verilog HDL targeting Antifuse and enhanced Flash FPGA's.
• Performing effective analysis of functional issues or performance profiling with the hardware and firmware in test environments or target host systems.
• Contribute to process improvements to ensure hardware-firmware quality and time-to-market.

Qualifications:

• Bachelor's Degree and minimum 4 years of prior relevant experience. Graduate Degree and a minimum of 2 years of prior related experience. In lieu of a degree, minimum of 8 years of prior related experience.

Preferred Additional Skills:

• Knowledge using Verilog for Logic Design.
• Programming experience in C for embedded systems, including development of algorithms, manipulation of data structures, and implementing highly optimized code.
• Experience with lab tools: Logic Analyzers, oscilloscopes, JTAG/ICE debuggers and protocol analyzers
• Familiar with hardware, software and firmware development methodologies to ensure quality and time-to-market (design verification, code reviews, unit testing, prototyping and product testing).
• Familiar working with code version control repository tools, such as Subversion (SVN), GIT or TFS.
• Digital Design practices and principles, logic design and architecture and experience with HDL's (i.e Verilog, VHDL).
• Knowledge using SystemVerilog for verification with AVM, VMM, OVM, or UVM a plus
• Developing C# source code targeting Bare-Metal Microcontroller Development.
• Good English knowledge (speech and writing);
• Be action-oriented and organized;
• Ability to handle short notice needs/requests

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L3Harris Technologies is proud to be an Equal Opportunity Employer. L3Harris is committed to treating all employees and applicants for employment with respect and dignity and maintaining a workplace that is free from unlawful discrimination. All applicants will be considered for employment without regard to race, color, religion, age, national origin, ancestry, ethnicity, gender (including pregnancy, childbirth, breastfeeding or other related medical conditions), gender identity, gender expression, sexual orientation, marital status, veteran status, disability, genetic information, citizenship status, characteristic or membership in any other group protected by federal, state or local laws. L3Harris maintains a drug-free workplace and performs pre-employment substance abuse testing and background checks, where permitted by law.

Please be aware many of our positions require the ability to obtain a security clearance. Security clearances may only be granted to U.S. citizens. In addition, applicants who accept a conditional offer of employment may be subject to government security investigation(s) and must meet eligibility requirements for access to classified information.

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