Austin, TX · Hybrid
$110.50K - $130.30K/yr
Hands-on experience with architectural decisions in technologies (storage, networking, compute) our chip engineers depend on. * Experience with ASIC, VLSI, CAD/EDA or mixed signal design workflow ...
Austin, TX · Hybrid
$110.50K - $130.30K/yr
Hands-on experience with architectural decisions in technologies (storage, networking, compute) our chip engineers depend on. * Experience with ASIC, VLSI, CAD/EDA or mixed signal design workflow ...
We're seeking a CAD Engineer to join our team and develop full-stack web applications that power ... chip design, VLSI, or CAD toolsInterest in AI/ML technologiesPersonal projects or internships ...
We're seeking a CAD Engineer to join our team and develop full-stack web applications that power ... chip design, VLSI, or CAD toolsInterest in AI/ML technologiesPersonal projects or internships ...
$126.80K - $190.90K/yr
... chip design, VLSI, or CAD tools Interest in AI/ML technologies Personal projects or internships ... engineering best practices including version control, testing, and CI/CD BS in Computer Science or ...
$126.80K - $190.90K/yr
... chip design, VLSI, or CAD tools Interest in AI/ML technologies Personal projects or internships ... engineering best practices including version control, testing, and CI/CD BS in Computer Science or ...
$126.80K - $190.90K/yr
... chip design, VLSI, or CAD tools Interest in AI/ML technologies Personal projects or internships ... engineering best practices including version control, testing, and CI/CD BS in Computer Science or ...
$126.80K - $190.90K/yr
... chip design, VLSI, or CAD tools Interest in AI/ML technologies Personal projects or internships ... engineering best practices including version control, testing, and CI/CD BS in Computer Science or ...
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
We're seeking a CAD Engineer to join our team and develop full-stack web applications that power ... Signoff is the critical final verification stage in chip design where designs are validated against ...
We're seeking a CAD Engineer to join our team and develop full-stack web applications that power ... Signoff is the critical final verification stage in chip design where designs are validated against ...
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
Austin, TX · On-site
$116K - $233.80K/yr
Team Description: The Brain Interfaces Soc Department delivers chip architecture and silicon ... S.) degree in Electrical Engineering and/or Computer Science or a related field, or equivalent ...
Austin, TX · On-site
$116K - $233.80K/yr
Team Description: The Brain Interfaces Soc Department delivers chip architecture and silicon ... S.) degree in Electrical Engineering and/or Computer Science or a related field, or equivalent ...
SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... Bachelor's degree in electrical engineering, computer engineering or computer science * 5+ years of ...
SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... Bachelor's degree in electrical engineering, computer engineering or computer science * 5+ years of ...
Description As a Full Chip Integration Engineer, you will be participating in the physical design ... CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with ...
Description As a Full Chip Integration Engineer, you will be participating in the physical design ... CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with ...
As a Full Chip Integration Engineer, you will be participating in the physical design, integration ... CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with ...
As a Full Chip Integration Engineer, you will be participating in the physical design, integration ... CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with ...
Description As a Full Chip Integration Engineer, you will be participating in the physical design ... CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with ...
Description As a Full Chip Integration Engineer, you will be participating in the physical design ... CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with ...
As a Full Chip Integration Engineer, you will be participating in the physical design, integration ... CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with ...
As a Full Chip Integration Engineer, you will be participating in the physical design, integration ... CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with ...
Austin, TX · On-site
$151K - $261K/yr
Team Description: The Brain Interfaces Soc Department delivers chip architecture and silicon ... S.) degree in Electrical Engineering and/or Computer Science or a related field, or equivalent ...
Austin, TX · On-site
$151K - $261K/yr
Team Description: The Brain Interfaces Soc Department delivers chip architecture and silicon ... S.) degree in Electrical Engineering and/or Computer Science or a related field, or equivalent ...
$147.40K - $272.10K/yr
We're seeking a CAD Engineer to join our team and develop full-stack web applications that power ... Signoff is the critical final verification stage in chip design where designs are validated against ...
$147.40K - $272.10K/yr
We're seeking a CAD Engineer to join our team and develop full-stack web applications that power ... Signoff is the critical final verification stage in chip design where designs are validated against ...
$147.40K - $272.10K/yr
We're seeking a CAD Engineer to join our team and develop full-stack web applications that power ... Signoff is the critical final verification stage in chip design where designs are validated against ...
$147.40K - $272.10K/yr
We're seeking a CAD Engineer to join our team and develop full-stack web applications that power ... Signoff is the critical final verification stage in chip design where designs are validated against ...
$10.96 - $12.63
2% of jobs
$12.63 - $14.30
4% of jobs
$15.96 is the 25th percentile. Wages below this are outliers.
$14.30 - $15.96
19% of jobs
$15.96 - $17.63
24% of jobs
The median wage is $17.74 / hr.
$17.63 - $19.30
17% of jobs
$20.30 is the 75th percentile. Wages above this are outliers.
$19.30 - $20.97
16% of jobs
$20.97 - $22.64
6% of jobs
$22.64 - $24.30
5% of jobs
$24.30 - $25.97
3% of jobs
$25.97 - $27.64
3% of jobs
$27.64 - $29.31
1% of jobs
$10
$19
$29
| Aspect | Internship Computer Chip Engineer | Entry-Level Computer Chip Engineer |
|---|---|---|
| Qualifications | Currently enrolled or recent graduate, some coursework in electrical engineering or computer engineering | Bachelor's degree in electrical/computer engineering or related field |
| Work Environment | Internship programs, supervised tasks, learning-focused | Full-time professional role, project responsibilities |
| Employer & Industry | Tech companies, semiconductor firms, research labs | Semiconductor companies, tech firms, manufacturing |
Internship Computer Chip Engineers are students or recent graduates gaining hands-on experience, often part-time or temporary. Entry-Level Computer Chip Engineers are full-time professionals responsible for designing and testing chips. Internships serve as a stepping stone, while entry-level roles involve more responsibility and independence in the industry.
$110.50K - $130.30K/yr
Full-time
Posted 6 days ago
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology-and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent. As an NVIDIAN, you'll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.
NVIDIA reinvented itself over two decades, inventing the GPU in 1999 to reshape PC gaming and modern computer graphics. As an engineer in our EDA Workflow Optimization team, you will partner closely with our engineering teams worldwide. You will understand workflows covering the full chip design process from inception through study, architecture, design, verification, emulation, layout, packaging, power-on and production. You will then guide teams to improve, and sometimes re-invent those flows. You will enable our engineers to have the best tools on the planet to make the most innovative chips in the world. You will perform investigations to understand flaws and opportunities, construct metrics to continuously measure performance of our flows and services, and other infrastructure. You will work with your team of EDA and software experts to build new infrastructure in an agile, production software environment. You will continuously innovate and enhance scalable, reliable, high performance systems and tools to enable the next generation of chips!
What you'll be doing:
Work in a diverse team performing fast paced investigations to empower our engineers to develop at the speed of light.
Participate in the full life-cycle of tool development, test, and deployment.
Work closely with other team members and chip engineers to understand and optimize how workflows use the compute and storage environments.
Build metrics that are reliable and easy to use by hundreds of engineers around the world.
Continuously improve our chip development process.
Directly contribute to the overall quality and time to market for our next generation chips.
What we need to see:
Strong experience investigating and debugging complex, multi-discipline problems in a UNIX engineering environment.
Hands-on experience with architectural decisions in technologies (storage, networking, compute) our chip engineers depend on.
Experience with ASIC, VLSI, CAD/EDA or mixed signal design workflow environments.
Hands-on experience with EDA tools.
Experienced in UNIX Systems programming and automation using Python and/or Shell.
Authoritative level usage of UNIX and UNIX utilities.
Excellent planning and communication skills.
Experience in applying data analysis principles and influencing data-driven decisions.
Flexibility/adaptability working in a dynamic environment with changing requirements.
BS in Computer Science or equivalent experience; MS (preferred).
5+yrs of relevant experience.
Ways to stand out from the crowd:
Experience with job schedulers (in particular IBM Spectrum LSF and/or SLURM).
Hands-on experience running GPU-based workloads in a batch computing environment and a deep understanding of distributed system principles.
Strong programming and debugging skills with C/C++, Python, and Perl on UNIX.
A passion for improving engineering productivity and efficiency via data-driven philosophy.
#LI-Hybrid
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 152,000 USD - 241,500 USD for Level 3, and 184,000 USD - 287,500 USD for Level 4.You will also be eligible for equity and benefits.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
Sourced by ZipRecruiter
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.
Computer and electronic product manufacturing
10,000+ Employees
Santa Clara, CA, US
1993
