Job Title : Sr FPGA Engineer Location : El Segundo, CA or Cedar Rapids, IA Pay Range : $85.00/hour ... Proficient in VHDL/Verilog for FPGA/ASIC design and implementation. * Experience in digital circuit ...
Quick apply
Job Title : Sr FPGA Engineer Location : El Segundo, CA or Cedar Rapids, IA Pay Range : $85.00/hour ... Proficient in VHDL/Verilog for FPGA/ASIC design and implementation. * Experience in digital circuit ...
Quick apply
Job Title : Sr FPGA Engineer Location : El Segundo, CA or Cedar Rapids, IA Pay Range : $85.00/hour ... Proficient in VHDL/Verilog for FPGA/ASIC design and implementation. * Experience in digital circuit ...
$132K - $182K/yr
As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
$132K - $182K/yr
As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
Santa Clarita, CA · On-site
... SoC/ASIC Design for Test (DFT). The ideal candidate will have strong expertise in DFT ... The candidate should have a solid understanding of digital design, RTL fundamentals, and be capable ...
Quick apply
Santa Clarita, CA · On-site
... SoC/ASIC Design for Test (DFT). The ideal candidate will have strong expertise in DFT ... The candidate should have a solid understanding of digital design, RTL fundamentals, and be capable ...
Collaborate with ASIC design, PCB design, mechanical, thermal, test, characterization ... Mentor engineers and contractors in package design methods, SI/PI analysis practices, modeling ...
New
Collaborate with ASIC design, PCB design, mechanical, thermal, test, characterization ... Mentor engineers and contractors in package design methods, SI/PI analysis practices, modeling ...
New
All of this is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration ...
All of this is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration ...
All of this is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration ...
All of this is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration ...
Los Angeles, CA · On-site
$100K - $140K/yr
As a Solar Engineer, you will contribute to the design, manufacturing, testing, and deployment of ... Internship in at least one of: photovoltaics, power systems, or materials characterization * Hands ...
Los Angeles, CA · On-site
$100K - $140K/yr
As a Solar Engineer, you will contribute to the design, manufacturing, testing, and deployment of ... Internship in at least one of: photovoltaics, power systems, or materials characterization * Hands ...
Los Angeles, CA · Remote
$126K - $250K/yr
You have 2+ years of continuous experience (e.g., internships don't count) as an Engineer or a Designer. You have good proficiency in both Design and Engineering, with exceptional proficiency in the ...
Quick apply
Los Angeles, CA · Remote
$126K - $250K/yr
You have 2+ years of continuous experience (e.g., internships don't count) as an Engineer or a Designer. You have good proficiency in both Design and Engineering, with exceptional proficiency in the ...
Los Angeles, CA · On-site
$269K - $376K/yr
The Principal ASIC Verification Engineer serves as a technical authority for verification of ... Drive alignment among design, architecture, systems, firmware, and validation teams. * Evaluate ...
Los Angeles, CA · On-site
$269K - $376K/yr
The Principal ASIC Verification Engineer serves as a technical authority for verification of ... Drive alignment among design, architecture, systems, firmware, and validation teams. * Evaluate ...
As a Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
As a Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
$100K - $140K/yr
As a Solar Engineer, you will contribute to the design, manufacturing, testing, and deployment of ... Internship or research experience with solar arrays or power systems for space applications
Quick apply
$100K - $140K/yr
As a Solar Engineer, you will contribute to the design, manufacturing, testing, and deployment of ... Internship or research experience with solar arrays or power systems for space applications
Los Angeles, CA · On-site
$100K - $140K/yr
As a Solar Engineer, you will contribute to the design, manufacturing, testing, and deployment of ... Internship or research experience with solar arrays or power systems for space applications
Los Angeles, CA · On-site
$100K - $140K/yr
As a Solar Engineer, you will contribute to the design, manufacturing, testing, and deployment of ... Internship or research experience with solar arrays or power systems for space applications
Ventura, CA · On-site
$76K - $122K/yr
Internship experience in engineering, product design, or medical device manufacturing environments * Basic understanding of human anatomy * Interest in medical device design and patient-specific ...
Ventura, CA · On-site
$76K - $122K/yr
Internship experience in engineering, product design, or medical device manufacturing environments * Basic understanding of human anatomy * Interest in medical device design and patient-specific ...
Woodland Hills, CA · On-site
$143K/yr
Design, develop, and verify high-speed digital hardware for safety-critical systems. * Implement FPGA, ASIC, and SoC solutions using VHDL and/or Verilog. * Perform digital verification and hardware ...
Quick apply
Woodland Hills, CA · On-site
$143K/yr
Design, develop, and verify high-speed digital hardware for safety-critical systems. * Implement FPGA, ASIC, and SoC solutions using VHDL and/or Verilog. * Perform digital verification and hardware ...
Los Angeles, CA · On-site
... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. In this highly visible role, you will be at the center of a silicon design group with a ...
Los Angeles, CA · On-site
... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. In this highly visible role, you will be at the center of a silicon design group with a ...
Calabasas, CA · On-site
$143K/yr
Design, develop, and verify high-speed digital hardware for safety-critical systems. * Implement FPGA, ASIC, and SoC solutions using VHDL and/or Verilog. * Perform digital verification and hardware ...
Calabasas, CA · On-site
$143K/yr
Design, develop, and verify high-speed digital hardware for safety-critical systems. * Implement FPGA, ASIC, and SoC solutions using VHDL and/or Verilog. * Perform digital verification and hardware ...
Ventura, CA · On-site
$76K - $122K/yr
Internship experience in engineering, product design, or medical device manufacturing environments * Basic understanding of human anatomy * Interest in medical device design and patient-specific ...
Ventura, CA · On-site
$76K - $122K/yr
Internship experience in engineering, product design, or medical device manufacturing environments * Basic understanding of human anatomy * Interest in medical device design and patient-specific ...
$20 - $21/hr
Co-Op - Design Engineer Location: Los Angeles, CA Start Date: July 2026 (6-Month Program) About ... Familiarity with SolidWorks or other 3D CAD software (coursework or internship experience a plus)
$20 - $21/hr
Co-Op - Design Engineer Location: Los Angeles, CA Start Date: July 2026 (6-Month Program) About ... Familiarity with SolidWorks or other 3D CAD software (coursework or internship experience a plus)
Los Angeles, CA · On-site
$20 - $21/hr
Co-Op - Design Engineer Location: Los Angeles, CA Start Date: July 2026 (6-Month Program) About ... Familiarity with SolidWorks or other 3D CAD software (coursework or internship experience a plus)
Los Angeles, CA · On-site
$20 - $21/hr
Co-Op - Design Engineer Location: Los Angeles, CA Start Date: July 2026 (6-Month Program) About ... Familiarity with SolidWorks or other 3D CAD software (coursework or internship experience a plus)
Los Angeles, CA · On-site
... and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. Description In this highly visible role, you will be at the center of a ...
Los Angeles, CA · On-site
... and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. Description In this highly visible role, you will be at the center of a ...
$97K - $107.2K
16% of jobs
$107.2K - $117.3K
3% of jobs
$117.3K - $127.4K
4% of jobs
$130.4K is the 25th percentile. Wages below this are outliers.
$127.4K - $137.6K
6% of jobs
The median wage is $144K / yr.
$137.6K - $147.7K
33% of jobs
$147.7K - $157.8K
3% of jobs
$157.8K - $168K
2% of jobs
$174.7K is the 75th percentile. Wages above this are outliers.
$168K - $178.1K
12% of jobs
$178.1K - $188.3K
5% of jobs
$188.3K - $198.4K
4% of jobs
$198.4K - $208.5K
12% of jobs
$97K
$155K
$208.5K
| Aspect | Internship Asic Rtl Design Engineer | Asic Verification Engineer |
|---|---|---|
| Credentials | Typically pursuing or recently completed a degree in Electrical Engineering or Computer Engineering | Similar educational background, often with additional coursework in verification methodologies |
| Work Environment | Internship setting, supervised, focused on learning and assisting in RTL design tasks | Full-time role, focused on testing and verifying RTL designs |
| Industry Usage | Used in semiconductor and chip design companies during early career stages | Common in companies developing complex integrated circuits and chips |
The Internship Asic Rtl Design Engineer focuses on assisting in RTL design tasks during an internship, emphasizing learning and support. In contrast, the Asic Verification Engineer is responsible for verifying RTL designs to ensure functionality. Both roles require similar educational backgrounds but differ in responsibilities and work environment, with verification roles being more advanced and permanent.

Sourced by ZipRecruiter
Recruiting and staffing services
11 - 50 Employees
Boston, MA, US
2009