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Internship Asic Rtl Design Engineer Jobs in Compton, CA

Silvus Technologies

FPGA Design Engineer

Los Angeles, CA · On-site

$100K - $140K/yr

THE OPPORTUNITY Silvus is seeking a Senior FPGA / RTL Design Engineer reporting to the Director of ... Experience with communication systems on FPGA or ASIC designs. COMPENSATION The pay range is NOT a ...

Apple

Wireless SoC Design Engineer

Los Angeles, CA · On-site

... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... This is a highly visible role, where you will be at the center of the ASIC design efforts ...

Apple

Wireless SoC Design Engineer

Los Angeles, CA · On-site

... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... This is a highly visible role, where you will be at the center of the ASIC design efforts ...

Apple

Wireless SoC Design Engineer

Los Angeles, CA

$175K - $308K/yr

... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... This is a highly visible role, where you will be at the center of the ASIC design efforts ...

Apple

Wireless SoC Design Engineer

Los Angeles, CA

$122K - $214K/yr

... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... This is a highly visible role, where you will be at the center of the ASIC design efforts ...

Apple

Wireless SoC Design Engineer

Los Angeles, CA

$122K - $214K/yr

... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... This is a highly visible role, where you will be at the center of the ASIC design efforts ...

Apple

Wireless SoC Design Engineer

Los Angeles, CA

$175K - $308K/yr

... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... This is a highly visible role, where you will be at the center of the ASIC design efforts ...

Apple

Wireless SoC Design Engineer

Los Angeles, CA

$175K - $308K/yr

... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... This is a highly visible role, where you will be at the center of the ASIC design efforts ...

Apple

Wireless SoC Design Engineer

Los Angeles, CA

$122K - $214K/yr

... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... This is a highly visible role, where you will be at the center of the ASIC design efforts ...

Apple

Wireless SoC Design Engineer

Los Angeles, CA

$175K - $308K/yr

... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... This is a highly visible role, where you will be at the center of the ASIC design efforts ...

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Showing results 21-40

All JobsAsic Rtl Design Engineer JobsInternship Asic Rtl Design Engineer JobsInternship Asic Rtl Design Engineer Jobs in Compton, CA

Internship Asic Rtl Design Engineer information

See Compton, CA salary details

$95.5K

$152.5K

$205.2K

How much do internship asic rtl design engineer jobs pay per year?

As of Aug 10, 2026, the average yearly pay for internship asic rtl design engineer in Compton, CA is $152,541.00, according to ZipRecruiter salary data. Most workers in this role earn between $133,600.00 and $182,800.00 per year, depending on experience, location, and employer.

What does an internship ASIC RTL design engineer do?

As an ASIC RTL Design Engineering intern, you'll typically work on tasks such as writing and verifying RTL code using languages like Verilog or VHDL, assisting with simulation and debugging, and collaborating closely with senior engineers on real design blocks. Interns often participate in design reviews, update documentation, and may get hands-on experience with synthesis and timing analysis tools. This role is highly collaborative and provides exposure to the complete ASIC development cycle, making it an excellent opportunity to build foundational skills and gain insight into industry-standard methodologies.

What are the key skills and qualifications needed to thrive as an internship ASIC RTL design engineer?

To thrive as an Internship ASIC RTL Design Engineer, you need a solid understanding of digital logic design, computer architecture, and proficiency in HDL languages like Verilog or VHDL, typically supported by coursework in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys, Cadence, or Mentor Graphics, and simulation environments is highly valuable. Strong analytical thinking, attention to detail, and effective communication skills help interns collaborate with teams and learn quickly in a fast-paced environment. These skills and qualities are essential for contributing to complex chip design projects and ensuring accuracy and efficiency in RTL development.

What is an internship ASIC RTL design engineer?

An Internship ASIC RTL (Register Transfer Level) Design Engineer is a student or recent graduate who assists in designing and developing digital integrated circuits (ICs) using hardware description languages like Verilog or VHDL. They work under the guidance of senior engineers to create, simulate, and verify RTL code for ASIC (Application Specific Integrated Circuit) projects. The role provides hands-on experience with the chip design process, including synthesis, timing analysis, and verification. Interns gain valuable exposure to industry-standard tools and methodologies, helping them prepare for a full-time engineering career.

What is the difference between Internship Asic Rtl Design Engineer vs Asic Verification Engineer?

AspectInternship Asic Rtl Design EngineerAsic Verification Engineer
CredentialsTypically pursuing or recently completed a degree in Electrical Engineering or Computer EngineeringSimilar educational background, often with additional coursework in verification methodologies
Work EnvironmentInternship setting, supervised, focused on learning and assisting in RTL design tasksFull-time role, focused on testing and verifying RTL designs
Industry UsageUsed in semiconductor and chip design companies during early career stagesCommon in companies developing complex integrated circuits and chips

The Internship Asic Rtl Design Engineer focuses on assisting in RTL design tasks during an internship, emphasizing learning and support. In contrast, the Asic Verification Engineer is responsible for verifying RTL designs to ensure functionality. Both roles require similar educational backgrounds but differ in responsibilities and work environment, with verification roles being more advanced and permanent.

What job categories do people searching Internship Asic Rtl Design Engineer jobs in Compton, CA look for? The top searched job categories for Internship Asic Rtl Design Engineer jobs in Compton, CA are:
What cities near Compton, CA are hiring for Internship Asic Rtl Design Engineer jobs? Cities near Compton, CA with the most Internship Asic Rtl Design Engineer job openings:
Internship Asic Rtl Design Engineer jobs near you
Infographic showing various Internship Asic Rtl Design Engineer job openings in Compton, CA as of June 2026, with employment types broken down into 1% Internship, 3% As Needed, 76% Full Time, 3% Part Time, and 17% Contract. Highlights an 96% Physical, 1% Hybrid, and 3% Remote job distribution, with an average salary of $152,541 per year, or $73.3 per hour.

FPGA Design Engineer

Silvus Technologies

Los Angeles, CA • On-site

$100K - $140K/yr

Full-time

Re-posted 21 days ago

Job description

THE COMPANY
Silvus Technologies, a leading provider of advanced MANET and MIMO communications systems, is reshaping mesh network technology for mission-critical applications - on the ground, in the air and at sea. Its battle-proven StreamCaster family of MANET radios and proprietary MN-MIMO waveform provides the vital communications link for defense, law enforcement and public safety agencies around the world, and in the toughest operational environments.
With deep roots in DARPA research, Silvus Technologies develops world-class advanced communications technologies that are reshaping the tactical communications landscape. From pure line-of-sight to extreme non-line-of-sight, Silvus radios form a self-healing, self-forming mesh network, enabling secure and reliable connectivity, including video and high-bandwidth data.
Silvus Technologies is a wholly owned subsidiary of Motorola Solutions, Inc.
Would you like to join an incredibly talented group of people, doing very challenging work, with the prime directive of "Keeping Our Heroes Connected"?
THE OPPORTUNITY
Silvus is seeking a Senior FPGA / RTL Design Engineer reporting to the Director of FPGA Engineering on the FPGA Engineering team. The successful individual in this role will participate in all aspects of the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal processing algorithms for Silvus' MIMO wireless networking products. In addition, they participate in the support and development of FPGA-based designs for our advanced wireless systems R&D. These are exciting projects targeted to address challenging real-world communication needs.
The Senior FPGA / RTL Design Engineer position will be based at Silvus headquarters in the heart of vibrant West Los Angeles, CA and is on a hybrid schedule; a minimum of 3 days onsite per week is expected. On-site days are Mondays, Wednesdays, and Thursdays.
The following is a list of at least some of the current essential job functions of the position. Management may assign or reassign duties and responsibilities at any time at its discretion.
ROLE AND RESPONSIBILITIES
  • Digital design architecting for wireless communication projects.
  • Fixed point design of signal processing blocks while working with systems engineers.
  • RTL coding, simulation, and test bench development.
  • FPGA synthesis and timing closure.
  • Hardware verification and troubleshooting; familiarity with logic analyzers.
  • Provide support to the RF and Software Engineering teams.

REQUIRED QUALIFICATIONS
  • Bachelor of Science degree in Electrical Engineering, Computer Science, or relevant fields.
  • Minimum 6 years of demonstrated experience in FPGA design; 4 years of FPGA design experience with a Master's of Science degree; 2 years of FPGA design experience with a PhD degree.
  • Demonstrated experience with fixed point binary arithmetic and digital signal processing designs.
  • Proven expertise working with multiple clock-domain, high-utilization FPGA designs.
  • Experience with Xilinx FPGAs, SoCs, and the Vivado IDE.
  • NOTE - Must be a U.S. Person (U.S. Citizen, or U.S. Permanent Resident) due to clients under U.S. federal contracts.

PREFERRED KNOWLEDGE, SKILLS, AND ABILITIES
  • Master of Science degree in Electrical Engineering (MSEE).
  • Basic MATLAB skill.
  • Experience with communication systems on FPGA or ASIC designs.

COMPENSATION
The pay range is NOT a guarantee. It is based on market research and peer data, and will vary depending on the candidate's experience and qualifications.
CA Pay Range
$100,000-$140,000 USD
Consistent with Motorola Solutions values and applicable law, we provide the following information to promote pay transparency and equity. Pay within this range varies and depends on job-related knowledge, skills, and experience. The actual offer will be based on the individual candidate.
NOTE - As a US Federal Contractor, Silvus Technologies requires that ALL candidates being considered for employment for any position (regardless of level) MUST be a U.S. Person (permanent resident or citizen). Stricter U.S. Citizen ONLY requirements (needed for some Engineering or R&D roles) will be included in the Required Qualifications section of the posted position. This does NOT apply to international positions; only job postings for positions located in the US.
Motorola Solutions is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion or belief, sex, sexual orientation, gender identity, national origin, disability, veteran status or any other legally-protected characteristic.
We are proud of our people-first and community-focused culture, empowering every Motorolan to be their most authentic self and to do their best work to deliver on the promise of a safer world. If you'd like to join our team but feel that you don't quite meet all of the preferred skills, we'd still love to hear why you think you'd be a great addition to our team.
We're committed to providing an inclusive and accessible recruiting experience for candidates with disabilities, or other physical or mental health conditions. To request an accommodation, please complete this Reasonable Accommodations Form so we can assist you.

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