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Internship Asic Rtl Design Engineer Jobs in Ashburn, VA

Sparton Corporation

FPGA Developer

Fairfax, VA · On-site

$94K - $156K/yr

... of RTL design for FPGAs in VHDL or Verilog, or System Verilog - knowledge of all 3 strongly ... C++ programming * Mapping data processing algorithms to FPGAs using Vitis HLS * Implementing AI/ML ...

Rocket Lab Corporation

Principal FPGA Engineer

Chantilly, VA · On-site

$142K - $174K/yr

... ASIC-based image processing algorithms. * Experience in both creating IP from scratch in RTL and ... PCB design and schematic capture and layout with tools such as Altium Designer. * Active TS/SCI ...

Rocket Lab Corporation

Sr. FPGA Engineer II

Chantilly, VA

$107K - $146K/yr

... ASIC-based image processing algorithms. * Experience in both creating IP from scratch in RTL and ... PCB design and schematic capture and layout with tools such as Altium Designer. * Active TS/SCI ...

Rocket Lab Corporation

Sr. FPGA Engineer II

Chantilly, VA · On-site

$143K - $214K/yr

... ASIC-based image processing algorithms. * Experience in both creating IP from scratch in RTL and ... PCB design and schematic capture and layout with tools such as Altium Designer. * Active TS/SCI ...

Curtiss-Wright

Principal FPGA Engineer

Ashburn, VA · On-site

$144K - $192K/yr

Principal FPGA Engineer - Onsite position Curtiss-Wright is seeking an experienced Principal FPGA ... Strong understanding of FPGA design flow, including RTL design (System Verilog, Verilog, or VHDL ...

Curtiss-Wright

Principal FPGA Engineer

Ashburn, VA · On-site

$144K - $192K/yr

Principal FPGA Engineer - Onsite position Curtiss-Wright is seeking an experienced Principal FPGA ... Strong understanding of FPGA design flow, including RTL design (System Verilog, Verilog, or VHDL ...

Curtisswright

Principal FPGA Engineer

Ashburn, VA · On-site

$144K - $192K/yr

Principal FPGA Engineer - Onsite position Curtiss-Wright is seeking an experienced Principal FPGA ... Strong understanding of FPGA design flow, including RTL design (System Verilog, Verilog, or VHDL ...

Curtiss-Wright

Principal FPGA Engineer

Ashburn, VA · On-site

$144K - $192K/yr

Principal FPGA Engineer - Onsite position Curtiss-Wright is seeking an experienced Principal FPGA ... Strong understanding of FPGA design flow, including RTL design (System Verilog, Verilog, or VHDL ...

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Internship Asic Rtl Design Engineer information

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$153.6K

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How much do internship asic rtl design engineer jobs pay per year?

As of Aug 22, 2026, the average yearly pay for internship asic rtl design engineer in Ashburn, VA is $153,591.00, according to ZipRecruiter salary data. Most workers in this role earn between $134,500.00 and $184,100.00 per year, depending on experience, location, and employer.

What is an internship ASIC RTL design engineer?

An Internship ASIC RTL (Register Transfer Level) Design Engineer is a student or recent graduate who assists in designing and developing digital integrated circuits (ICs) using hardware description languages like Verilog or VHDL. They work under the guidance of senior engineers to create, simulate, and verify RTL code for ASIC (Application Specific Integrated Circuit) projects. The role provides hands-on experience with the chip design process, including synthesis, timing analysis, and verification. Interns gain valuable exposure to industry-standard tools and methodologies, helping them prepare for a full-time engineering career.

What does an internship ASIC RTL design engineer do?

As an ASIC RTL Design Engineering intern, you'll typically work on tasks such as writing and verifying RTL code using languages like Verilog or VHDL, assisting with simulation and debugging, and collaborating closely with senior engineers on real design blocks. Interns often participate in design reviews, update documentation, and may get hands-on experience with synthesis and timing analysis tools. This role is highly collaborative and provides exposure to the complete ASIC development cycle, making it an excellent opportunity to build foundational skills and gain insight into industry-standard methodologies.

What are the key skills and qualifications needed to thrive as an internship ASIC RTL design engineer?

To thrive as an Internship ASIC RTL Design Engineer, you need a solid understanding of digital logic design, computer architecture, and proficiency in HDL languages like Verilog or VHDL, typically supported by coursework in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys, Cadence, or Mentor Graphics, and simulation environments is highly valuable. Strong analytical thinking, attention to detail, and effective communication skills help interns collaborate with teams and learn quickly in a fast-paced environment. These skills and qualities are essential for contributing to complex chip design projects and ensuring accuracy and efficiency in RTL development.

What is the difference between Internship Asic Rtl Design Engineer vs Asic Verification Engineer?

AspectInternship Asic Rtl Design EngineerAsic Verification Engineer
CredentialsTypically pursuing or recently completed a degree in Electrical Engineering or Computer EngineeringSimilar educational background, often with additional coursework in verification methodologies
Work EnvironmentInternship setting, supervised, focused on learning and assisting in RTL design tasksFull-time role, focused on testing and verifying RTL designs
Industry UsageUsed in semiconductor and chip design companies during early career stagesCommon in companies developing complex integrated circuits and chips

The Internship Asic Rtl Design Engineer focuses on assisting in RTL design tasks during an internship, emphasizing learning and support. In contrast, the Asic Verification Engineer is responsible for verifying RTL designs to ensure functionality. Both roles require similar educational backgrounds but differ in responsibilities and work environment, with verification roles being more advanced and permanent.

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Principal FPGA Engineer

Rocket Lab Corporation

Chantilly, VA

Full-time

Re-posted yesterday

Rocket Lab rating

9.2

Company rating: 9.2 out of 10

Based on 14 frontline employees who took The Breakroom Quiz

4th of 72 rated aerospace companies

Job description

ABOUT ROCKET LAB

Rocket Lab is an end-to-end space company delivering responsive launch services, complete spacecraft design and manufacturing, payloads, satellite components, and more – all with the goal of opening access to space. The rockets and satellites we build and launch enable some of the most ambitious and vital space missions globally, supporting scientific exploration, Earth observation and missions to combat climate change, national security, and exciting new technology demonstrations.

Our Electron rocket has become the second most frequently launched U.S. rocket annually and has delivered more than 230 satellites to orbit, all while we work to develop Neutron, our upcoming medium-lift, reusable launch vehicle for larger constellation deployment. Our Space Systems business designs and builds our extensive line of satellites, payloads, and their components, including spacecraft that have been selected to support NASA missions to the Moon and Mars and components used on the James Webb Space Telescope.

SPACE SYSTEMS

At Rocket Lab, we're not just launching rockets — we're building the future of space. Our Space Systems team builds everything from complete spacecraft, precision payloads to the components and subsystems that allow them to thrive in space, like solar panels, flight software, star trackers, optical systems, separation systems, radios, and more.

Our Space Systems team has enabled more than 1,700 missions, ranging from interplanetary exploration, in-space manufacturing to national security and defense initiatives. The team has built spacecraft, payloads, and components for missions to the Moon and Mars, working with partners including NASA, the Space Development Agency, and the U.S. Space Force. Whether it's a single high-performance spacecraft, constellation, or the vertically integrated components that help them get to space — our world class Space Systems team is empowering some of the boldest and most ambitious space missions.

PRINCIPAL FPGA ENGINEER

Rocket Lab's Optical Systems division solves mission-critical space domain and Intelligence, Surveillance, and Reconnaissance (ISR) challenges for Department of Defense (DoD) and Intelligence Community (IC) customers. Our vision is to revolutionize the space-based payload market with innovative and novel designs for space, terrestrial, and airborne environments. Building on more than 20 years of electro-optical and infrared systems innovation from Geost, Optical Systems delivers solutions to the warfighter for responsive, scalable sensing solutions across all orbital domains.

As a Principal FPGA Engineer based at our Optical Systems sites in Chantilly, VA, you will have the opportunity to support Tranche 3 of the U.S. Space Development Agency's (SDA) Proliferated Warfighter Space Architecture (PWSA) by designing FPGAs for advanced electro-optical (EO/IR) spacecraft payloads.

WHAT YOU'LL GET TO DO

  • Work with the hardware design team on requirements.
  • Complete FPGA logic design, coding, simulation, and testing.
  • Support hardware and software development teams in bring-up and test of products.
  • Provide subject-matter expertise regarding design and automated test development procedures to customers and production support team.
  • Perform research and analysis of data, such as customer proposed specifications, datasheets, or manuals to determine design approach and/or feasibility.
  • Execute debugging of the design in the lab.
  • Perform synthesis, implementation, and timing analysis.

YOU'LL BRING THESE QUALIFICATIONS PRINCIPAL ENGINEER:

  • Bachelor's degree in computer engineering or electrical engineering or equivalent discipline with 12+ years of experience.
  • Experience in FPGA firmware design with VHDL.
  • Ability to obtain and maintain an U.S. Government security clearance.

THESE QUALIFICATIONS WOULD BE NICE TO HAVE:

  • Experience with Xilinx/AMD Versal architecture
  • Experience with FPGAs and embedded systems in a radiation environment, including SEU/SEL impact and mitigation.
  • Experience in FPGA- or ASIC-based image processing algorithms.
  • Experience in both creating IP from scratch in RTL and integrating existing IP into RTL and block designs.
  • Familiarity with C, Python or MATLAB and/or experience translating algorithms from a scripted language to HDL.
  • Experience with software interfaces including interrupts and DMA.
  • Experience with DDR4, Aurora, and high-speed transceiver design and verification.
  • Familiarity with AXI Stream and AXI Memory Mapped interfaces.
  • PCB design and schematic capture and layout with tools such as Altium Designer.
  • Active TS/SCI security clearance.

This position may require prolonged periods of sitting, standing, walking, computer work, and occasional exposure to moderate levels of noise, dust, and fumes in production areas.

WHAT TO EXPECT

We're on a mission to unlock the potential of space to improve life on Earth, but that's not an easy task. It takes hard work, determination, relentless innovation, teamwork, grit, and an unwavering commitment to achieving what others often deem impossible. Our people out-think, out-work, and out-pace. We pride ourselves on having each other's backs, checking our egos at the door, and rolling up our sleeves on all tasks big and small. We thrive under pressure, work to tight deadlines, and our focus is always on how we can deliver, rather than dwelling on the challenges that stand in the way.

Important information:

FOR CANDIDATES SEEKING TO WORK IN US OFFICES ONLY:

To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR), Rocket Lab Employees must be a U.S. citizen, lawful U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum, or be eligible to obtain the required authorizations from the U.S. Department of State and/or the U.S. Department of Commerce, as applicable. Learn more about ITAR here.

Rocket Lab provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state, or local laws. This policy applies to all terms and conditions of employment at Rocket Lab, including recruiting, hiring, placement, promotion, termination, layoff, recall, transfer, leaves of absence, compensation, and training.

Applicants requiring a reasonable accommodation for the application/interview process for a job in the United States should contact Giulia Johnson at g.biow@rocketlabusa.com.This dedicated resource is intended solely to assist job seekers with disabilities whose disability prevents them from being able to apply/interview. Only messages left for this purpose will be considered. A response to your request may take up to two business days.

FOR CANDIDATES SEEKING TO WORK IN NEW ZEALAND OFFICES ONLY:

For security reasons, background checks will be undertaken prior to any employment offers being made to an applicant. These checks will include nationality checks as it is a requirement of this position that you be eligible to access equipment and data regulated by the United States' International Traffic in Arms Regulations.

Under these Regulations, you may be ineligible for this role if you do not hold citizenship of Australia, Japan, New Zealand, Switzerland, the European Union, or a country that is part of NATO, or if you hold ineligible dual citizenship or nationality. For more information on these Regulations, click here ITAR Regulations.

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