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Internship Asic Rtl Design Engineer Jobs in North Carolina

If you don't know us yet, we are an engineering and technological innovation company working on ... Software design and development * Algorithm development * Fluent in English (C1 or higher)

Senior Physical Design Engineer

Raleigh, NC ยท On-site

$101K - $139K/yr

Responsible for RTL to GDS implementation in Physical Design domain for production flagship ... Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND ...

We are now looking for a Senior ASIC Power Engineer! NVIDIA is seeking extraordinary power ... efficient RTL to achieve design targets * You will be working with architects, designers ...

Lead Design Engineer

Cary, NC ยท On-site

$104K - $137K/yr

Work on RTL synthesis and floorplanning * Build clock trees and perform optimizations * Close ... Interface with Front End RTL design teams and Back End Verification teams Position Requirements ...

MTS Digital Engineering

Morrisville, NC ยท Hybrid

$58K - $108K/yr

As a New College Graduate Design Engineer, the full-time position candidate will be responsible for specifying, architecting, implementing, and simulating RTL components. The individual will work ...

MTS Digital Engineering

Morrisville, NC ยท On-site

$58K - $108K/yr

Overview As a New College Graduate Design Engineer, the full-time position candidate will be responsible for specifying, architecting, implementing, and simulating RTL components. The individual will ...

MTS Digital Engineering

Morrisville, NC ยท Hybrid

$58K - $108K/yr

Overview As a New College Graduate Design Engineer, the full-time position candidate will be responsible for specifying, architecting, implementing, and simulating RTL components. The individual will ...

NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding ... Help in driving frontend and backend implementation from RTL to gds2, including synthesis ...

Showing results 21-40

Internship Asic Rtl Design Engineer information

What does an internship ASIC RTL design engineer do?

As an ASIC RTL Design Engineering intern, you'll typically work on tasks such as writing and verifying RTL code using languages like Verilog or VHDL, assisting with simulation and debugging, and collaborating closely with senior engineers on real design blocks. Interns often participate in design reviews, update documentation, and may get hands-on experience with synthesis and timing analysis tools. This role is highly collaborative and provides exposure to the complete ASIC development cycle, making it an excellent opportunity to build foundational skills and gain insight into industry-standard methodologies.

What are the key skills and qualifications needed to thrive as an internship ASIC RTL design engineer?

To thrive as an Internship ASIC RTL Design Engineer, you need a solid understanding of digital logic design, computer architecture, and proficiency in HDL languages like Verilog or VHDL, typically supported by coursework in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys, Cadence, or Mentor Graphics, and simulation environments is highly valuable. Strong analytical thinking, attention to detail, and effective communication skills help interns collaborate with teams and learn quickly in a fast-paced environment. These skills and qualities are essential for contributing to complex chip design projects and ensuring accuracy and efficiency in RTL development.

What is an internship ASIC RTL design engineer?

An Internship ASIC RTL (Register Transfer Level) Design Engineer is a student or recent graduate who assists in designing and developing digital integrated circuits (ICs) using hardware description languages like Verilog or VHDL. They work under the guidance of senior engineers to create, simulate, and verify RTL code for ASIC (Application Specific Integrated Circuit) projects. The role provides hands-on experience with the chip design process, including synthesis, timing analysis, and verification. Interns gain valuable exposure to industry-standard tools and methodologies, helping them prepare for a full-time engineering career.

What is the difference between Internship Asic Rtl Design Engineer vs Asic Verification Engineer?

AspectInternship Asic Rtl Design EngineerAsic Verification Engineer
CredentialsTypically pursuing or recently completed a degree in Electrical Engineering or Computer EngineeringSimilar educational background, often with additional coursework in verification methodologies
Work EnvironmentInternship setting, supervised, focused on learning and assisting in RTL design tasksFull-time role, focused on testing and verifying RTL designs
Industry UsageUsed in semiconductor and chip design companies during early career stagesCommon in companies developing complex integrated circuits and chips

The Internship Asic Rtl Design Engineer focuses on assisting in RTL design tasks during an internship, emphasizing learning and support. In contrast, the Asic Verification Engineer is responsible for verifying RTL designs to ensure functionality. Both roles require similar educational backgrounds but differ in responsibilities and work environment, with verification roles being more advanced and permanent.

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Infographic showing various Internship Asic Rtl Design Engineer job openings in North Carolina as of August 2026, with employment types broken down into 72% Full Time, and 28% Contract. Highlights an 74% In-person, and 26% Remote job distribution.

ASIC Verification Engineer (Remote - USA)

Encore Semi, Inc.

Raleigh, NC โ€ข Remote

$120K - $135K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 13 days ago


Job description

ASIC Verification Engineer
Full-time: Salary + Benefits + Bonuses | Contractor Opportunities Available
Work Status: US Citizen or Lawful Permanent Resident
Location: Remote — Anywhere in the USA
Build the Future of High-Performance SoCs
We are looking for talented ASIC Verification Engineers to join our growing team and help deliver next-generation networking, AI accelerator, and high-performance compute SoCs.
This is an opportunity to work on complex silicon designs where verification quality directly impacts first-pass silicon success. You’ll own critical verification challenges, build scalable environments, debug sophisticated RTL issues, and collaborate with experienced engineers across design, software, emulation, and post-silicon teams.
If you enjoy solving hard verification problems, building robust methodologies, and pushing the limits of SoC performance and reliability, we’d like to hear from you.
What You’ll Do
  • Own end-to-end ASIC/SoC verification activities from test planning through coverage closure and signoff.
  • Develop and enhance SystemVerilog/UVM-based verification environments at block, subsystem, and full-chip levels.
  • Create verification plans, write comprehensive test scenarios, run regressions, and drive debugging to closure.
  • Partner closely with RTL designers, architects, firmware teams, emulation, and post-silicon validation engineers.
  • Analyze failures, identify root causes, and help deliver high-quality silicon on aggressive schedules.
  • Improve verification productivity by adopting automation, advanced methodologies, and AI-assisted tools.
  • Contribute to verification best practices and mentor team members as the organization grows.
What You’ll Bring
  • 4+ years of hands-on ASIC/SoC verification experience.
  • Strong expertise in SystemVerilog, UVM, VCS, Verdi, and industry-standard verification flows.
  • Experience building verification environments from the ground up.
  • Solid understanding of complex SoC designs including multi-clock, CDC, and reset-domain architectures.
  • Proficiency with scripting and automation using Python, Tcl, Perl, or Shell.
  • Experience with source control tools such as Git or SVN.
  • Background verifying high-speed networking and communication technologies.
  • Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field (Master’s preferred).
Why Join Us?
You’ll work with a highly skilled engineering team tackling some of the toughest challenges in high-speed networking, AI acceleration, and advanced semiconductor design. We value engineers who are hands-on, curious, and passionate about building silicon that makes a real impact.
The anticipated annual base salary for this position is between $120,000 to $135,000, which also includes a comprehensive benefits package.
Full-Time Benefits:
• 15 days of PTO per calendar year
• 10 paid Holidays per calendar year
• Comprehensive Medical Benefits: Company covers 80% of premiums for Employee and Dependents
• Dental & Vision: Company covers 50% of premiums for Employee and Dependents
• Voluntary Benefits: Life Insurance, FSA (Health and Dependent, Limited Purpose), HAS, and Gap Insurance
• Employee Assistant Program (EAP)
• 401k - Traditional & Roth
• Life/AD&D and Long-Term Disability
• Tuition reimbursement
Equal Opportunity Policy Statement
Encore Semi, Inc. is an Equal Opportunity Employer that does not discriminate on the basis of actual or perceived race, religion, creed, color, age, sex, sexual orientation, gender, gender identity or expression, national origin, genetics, ancestry, marital status, civil union status, medical condition, disability (mental and physical), military and veteran status, pregnancy, childbirth and related medical conditions, or any other characteristic protected by applicable federal, state, or local laws and ordinances.
Encore Semi is also committed to compliance with all fair employment practices regarding citizenship and immigration status.
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