Engineering->Platforms->FPGA SoC Group Reports To: HW CCA and L-band Manager FLSA Status: Exempt ... Design, develop, document hardware designs for satellite modems and related products including:
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Engineering->Platforms->FPGA SoC Group Reports To: HW CCA and L-band Manager FLSA Status: Exempt ... Design, develop, document hardware designs for satellite modems and related products including:
FPGA VHDL Design Engineer US Citizenship required
Tucson, AZ · On-site
$116K - $160K/yr
... technology, engineering, and mathematics who are interested in working with us to help ... for SOC design - Use of VHDL and Verilog - Use of ARM processor cores and associated peripherals ...
FPGA VHDL Design Engineer US Citizenship required
Tucson, AZ · On-site
$116K - $160K/yr
... technology, engineering, and mathematics who are interested in working with us to help ... for SOC design - Use of VHDL and Verilog - Use of ARM processor cores and associated peripherals ...
FPGA VHDL Design Engineer US Citizenship required
Tucson, AZ · On-site
$116K - $160K/yr
... technology, engineering, and mathematics who are interested in working with us to help ... for SOC design - Use of VHDL and Verilog - Use of ARM processor cores and associated peripherals ...
FPGA VHDL Design Engineer US Citizenship required
Tucson, AZ · On-site
$116K - $160K/yr
... technology, engineering, and mathematics who are interested in working with us to help ... for SOC design - Use of VHDL and Verilog - Use of ARM processor cores and associated peripherals ...
An opening exists for Tech Staff/Sr. Staff IO Design Engineer with an interest in developing the next generation of storage and memory controller SoC products. This will involve taking a design from ...
An opening exists for Tech Staff/Sr. Staff IO Design Engineer with an interest in developing the next generation of storage and memory controller SoC products. This will involve taking a design from ...
Hardware Engineer (Space)
Tempe, AZ · On-site
$129K - $194K/yr
Define and drive FPGA architecture and SoC integration across the hardware platform * Design high ... Coordinate with a multidisciplinary engineering team through hardware development milestones and ...
Hardware Engineer (Space)
Tempe, AZ · On-site
$129K - $194K/yr
Define and drive FPGA architecture and SoC integration across the hardware platform * Design high ... Coordinate with a multidisciplinary engineering team through hardware development milestones and ...
The role will include working with analog and digital engineers to create mixed-signal IPs and SoC products. As a Principal Digital Design Engineer, the candidate shall be working with multi-sited ...
The role will include working with analog and digital engineers to create mixed-signal IPs and SoC products. As a Principal Digital Design Engineer, the candidate shall be working with multi-sited ...
The role will include working with analog and digital engineers to create mixed-signal IPs and SoC products. As a Principal Digital Design Engineer, the candidate shall be working with multi-sited ...
The role will include working with analog and digital engineers to create mixed-signal IPs and SoC products. As a Principal Digital Design Engineer, the candidate shall be working with multi-sited ...
We're looking for a Principal Engineer who thrives on solving hard problems, someone who can bring ... Experience working across CPU, GPU, or SoC design teams. * Publications, patents, or recognized ...
We're looking for a Principal Engineer who thrives on solving hard problems, someone who can bring ... Experience working across CPU, GPU, or SoC design teams. * Publications, patents, or recognized ...
Real Estate, Facilities Planning and Design Intern
Scottsdale, AZ · On-site
$20/hr
... programming, and real estate portfolio management within a national healthcare organization. As a Real Estate, Facilities Planning and Design Intern , you won't simply observe-you'll become an active ...
Real Estate, Facilities Planning and Design Intern
Scottsdale, AZ · On-site
$20/hr
... programming, and real estate portfolio management within a national healthcare organization. As a Real Estate, Facilities Planning and Design Intern , you won't simply observe-you'll become an active ...
Senior CPU Design Verification Engineer
Phoenix, AZ · On-site
$135K - $164K/yr
Lead presilicon functional verification of complex CPU and SoC logic to ensure full compliance with ... physical design engineers to improve design quality and verification effectiveness. * Influence ...
Senior CPU Design Verification Engineer
Phoenix, AZ · On-site
$135K - $164K/yr
Lead presilicon functional verification of complex CPU and SoC logic to ensure full compliance with ... physical design engineers to improve design quality and verification effectiveness. * Influence ...
Intern- Civil Engineering
Scottsdale, AZ · On-site
$17.50 - $23/hr
Civil Engineering Intern - Summer 2026 Join a team where your ideas and energy shape meaningful ... About Paradigm Design Paradigm Design is a nationally recognized architecture and engineering firm ...
Intern- Civil Engineering
Scottsdale, AZ · On-site
$17.50 - $23/hr
Civil Engineering Intern - Summer 2026 Join a team where your ideas and energy shape meaningful ... About Paradigm Design Paradigm Design is a nationally recognized architecture and engineering firm ...
Intern- Civil Engineering
Scottsdale, AZ · On-site
$17.50 - $23/hr
Civil Engineering Intern - Summer 2026 Join a team where your ideas and energy shape meaningful ... About Paradigm Design Paradigm Design is a nationally recognized architecture and engineering firm ...
Intern- Civil Engineering
Scottsdale, AZ · On-site
$17.50 - $23/hr
Civil Engineering Intern - Summer 2026 Join a team where your ideas and energy shape meaningful ... About Paradigm Design Paradigm Design is a nationally recognized architecture and engineering firm ...
Community Organizing Intern - Part-Time (Unpaid) Position Title: Community Organizing Intern ... Flexible schedule with remote work options Key Responsibilities: * Assist A2 Organizers and SOC ...
Community Organizing Intern - Part-Time (Unpaid) Position Title: Community Organizing Intern ... Flexible schedule with remote work options Key Responsibilities: * Assist A2 Organizers and SOC ...
Community Organizing Intern - Part-Time (Unpaid) Position Title: Community Organizing Intern ... Flexible schedule with remote work options Key Responsibilities: * Assist A2 Organizers and SOC ...
Community Organizing Intern - Part-Time (Unpaid) Position Title: Community Organizing Intern ... Flexible schedule with remote work options Key Responsibilities: * Assist A2 Organizers and SOC ...
Community Organizing Intern - Part-Time (Unpaid) Position Title: Community Organizing Intern ... Flexible schedule with remote work options Key Responsibilities: * Assist A2 Organizers and SOC ...
Community Organizing Intern - Part-Time (Unpaid) Position Title: Community Organizing Intern ... Flexible schedule with remote work options Key Responsibilities: * Assist A2 Organizers and SOC ...
Principal Engineer, Digital Design Engineer (AI/ML)
Chandler, AZ · On-site
$198K/yr
As a Principal Digital Design Engineer, you will lead the architecture and implementation of ... Familiarity with digital interfaces (I2C, SPI, UART) and mixed-signal SoC integration * Strong ...
Principal Engineer, Digital Design Engineer (AI/ML)
Chandler, AZ · On-site
$198K/yr
As a Principal Digital Design Engineer, you will lead the architecture and implementation of ... Familiarity with digital interfaces (I2C, SPI, UART) and mixed-signal SoC integration * Strong ...
Mechanical Engineer - Tucson, AZ- Active Secret Clearance Requir with Security Clearance
Tucson, AZ · On-site
... SOC's client onsite in Tucson, AZ. Contract Length: 12-Months **Must have an active Secret Clearance to be considered for this role** Our Client is seeking a Mechanical Engineer to support the design ...
Mechanical Engineer - Tucson, AZ- Active Secret Clearance Requir with Security Clearance
Tucson, AZ · On-site
... SOC's client onsite in Tucson, AZ. Contract Length: 12-Months **Must have an active Secret Clearance to be considered for this role** Our Client is seeking a Mechanical Engineer to support the design ...
As a Staff Mixed-Signal Design Engineer, you will develop high-performance analog and mixed-signal ... Familiarity with digital interface protocols (I2C, SPI, UART) and mixed-signal SoC integration
As a Staff Mixed-Signal Design Engineer, you will develop high-performance analog and mixed-signal ... Familiarity with digital interface protocols (I2C, SPI, UART) and mixed-signal SoC integration
Senior Engineer I - Physical Design
Chandler, AZ · On-site
$102K - $141K/yr
... SOC designs, delivering the next generation of hierarchical, low power, mixed signal ... Engineering or Equivalent * Minimum of 5 years of hands-on experience in Physical Design and ...
Senior Engineer I - Physical Design
Chandler, AZ · On-site
$102K - $141K/yr
... SOC designs, delivering the next generation of hierarchical, low power, mixed signal ... Engineering or Equivalent * Minimum of 5 years of hands-on experience in Physical Design and ...
As a Staff Digital Design Engineer, you will develop complex digital subsystems within ADI's mixed ... Familiarity with digital interfaces (I2C, SPI, UART) and mixed-signal SoC integration * Strong ...
As a Staff Digital Design Engineer, you will develop complex digital subsystems within ADI's mixed ... Familiarity with digital interfaces (I2C, SPI, UART) and mixed-signal SoC integration * Strong ...
Intern Soc Design Engineer information
What is the difference between Intern Soc Design Engineer vs Intern Hardware Design Engineer?
| Aspect | Intern Soc Design Engineer | Intern Hardware Design Engineer |
|---|---|---|
| Required Skills | Digital/analog circuit design, FPGA, PCB layout, scripting | Circuit schematic, PCB design, component selection, testing |
| Work Environment | Semiconductor companies, electronics firms, R&D labs | Consumer electronics, industrial equipment, R&D teams |
| Common Usage | Focus on system-on-chip (SoC) architecture and integration | Focus on hardware components and circuit implementation |
Intern Soc Design Engineers typically work on integrated circuit architecture and system integration, while Intern Hardware Design Engineers focus on designing and testing physical hardware components. Both roles involve electronics fundamentals but differ in scope and specific technical skills.
What cities in Arizona are hiring for Intern Soc Design Engineer jobs? Cities in Arizona with the most Intern Soc Design Engineer job openings:
Full-time
Re-posted 9 days ago
Job description
Job Title: Senior Hardware Engineer III
Department: Engineering->Platforms->FPGA SoC Group
Reports To: HW CCA and L-band Manager
FLSA Status: Exempt
Last Modified: 9/10/2025
Level: T3
Location Chandler, AZ – Onsite 5 Days a week
Company Overview
Comtech Telecommunications Corp. is a leading global technology company providing terrestrial and wireless network solutions, next-generation 9-1-1 emergency services, satellite and space communications technologies, and cloud-native capabilities to commercial and government customers around the world. Our unique culture of innovation and employee empowerment unleashes a relentless passion for customer success. With multiple facilities located in technology corridors throughout the United States and around the world, Comtech leverages our global presence, technology leadership, and decades of experience to create the world’s most innovative communications solutions. For more information, please visit www.comtech.com.
We’re seeking curious, growth-minded thinkers to help shape our vision, structures, and systems; playing a key role as we launch into our ambitious future. If you’re invigorated by our mission, values, and drive to change the world — we’d love to have you apply.
Position Summary
Hardware engineer responsible for designing and testing next generation satellite modems.
Responsibilities
- Design, develop, document hardware designs for satellite modems and related products including:
- FPGA-based satellite modems integrated on PCBs
- Component selection
- Schematic design and layout
- Signal Integrity (SI) and Power Integrity (PI) analysis
- Board bring-up and debugging
- Utilize strong communication skills to effectively work and communicate with team members and engineering management.
Qualifications.
- Strong communications systems design experience
- Experience with FPGAs, circuit design, microprocessors, memory devices such as DDR/LPDDR, Flash, SPI NOR, eMMC.
- Experience with clock distribution including PLLs, fanout buffers, differential and single-ended, termination techniques
- Experience with power distribution network design and analysis
- Familiarity with Ethernet PHY and switch chips, SERDES interfaces, memory chips, ADCs, DACs
- Use of laboratory measurement tools (spectrum analyzer, oscilloscope, vector network analyzer, logic analyzer, etc.)
- Proficient in Microsoft Office Tools (Word, Excel, PowerPoint, Visio, etc.)
- Demonstrated experience supporting multi-disciplinary, cross functional and matrixed teams
Desired Qualifications
- Working knowledge of SATCOM waveforms and satellite communications
- Knowledge of RF/ L-band design and layout
- Soldering / rework skills
- Demonstrated leadership and mentoring skills.
- Possess an active DoD clearance or demonstrate readiness to obtain one
Education
- Bachelors in Electrical Engineering (or related degree).
Experience:
- 5+ years of hardware design experience.
Comtech Telecommunications Corp. is an Equal Opportunity Employer. Qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability protected veteran status or other characteristics protected by law.