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Intern Analog Layout Design Engineer Jobs in Connecticut

GAL AeroStaff

FPGA Designer

West Hartland, CT

$122K - $168K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

Experience with Actel, Xilinx, Altera, or similar programmable logic platforms * Experience using hardware description, design, and simulation tools * Knowledge of analog and digital interface design

Quest Global

Physical Design Lead Engineer

Windsor, CT · On-site

$130K - $160K/yr

  • Medical

  • Retirement

  • PTO

Physical Design Lead Engineer Location: 175 Addison Rd, Entrance A, Windsor, CT 06095 and ... Work on Physical Verification (PV) , Design Rule Check (DRC) , Layout Versus Schematic (LVS ...

Quest Global

Physical Design Lead Engineer

Windsor, CT

$130K - $160K/yr

  • Medical

  • Retirement

  • PTO

Physical Design Lead Engineer Location: 175 Addison Rd, Entrance A, Windsor, CT 06095 and ... Work on Physical Verification (PV) , Design Rule Check (DRC) , Layout Versus Schematic (LVS ...

Quest Global

Physical Design Lead Engineer

Windsor, CT · On-site

$130K - $160K/yr

  • Medical

  • Retirement

  • PTO

Physical Design Lead Engineer Location: 175 Addison Rd, Entrance A, Windsor, CT 06095 and ... Work on Physical Verification (PV) , Design Rule Check (DRC) , Layout Versus Schematic (LVS ...

StaffRight Associates, LLC

Electronics Engineer

Groton, CT · On-site

$100K - $160K/yr

  • Retirement

Architect, design, procure, and evaluate custom analog and digital printed circuit boards from ... Command of physical hardware processes, including Electronic Layout , Bill Of Materials Management ...

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All JobsIntern Analog Layout Design Engineer JobsIntern Analog Layout Design Engineer Jobs in Connecticut

Intern Analog Layout Design Engineer information

What is the difference between Intern Analog Layout Design Engineer vs Intern Digital Layout Design Engineer?

AspectIntern Analog Layout Design EngineerIntern Digital Layout Design Engineer
Required SkillsAnalog circuit fundamentals, layout design, SPICE simulationDigital circuit fundamentals, RTL design, layout automation tools
Work EnvironmentDesign teams focused on analog/mixed-signal ICsDesign teams focused on digital ICs and FPGA/ASIC design
Industry UsageSemiconductor companies, chip design firmsSemiconductor companies, FPGA/ASIC vendors

Intern Analog Layout Design Engineers focus on analog/mixed-signal IC layout, requiring knowledge of analog circuits and layout tools. Intern Digital Layout Design Engineers work on digital ICs, emphasizing digital design principles and automation. Both roles are common in semiconductor industries but differ in technical focus and tools used.

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Intern Analog Layout Design Engineer jobs near you
Infographic showing various Intern Analog Layout Design Engineer job openings in Connecticut as of August 2026, with employment types broken down into 84% Full Time, 11% Part Time, 1% Temporary, and 4% Contract. Highlights an 84% Physical, 5% Hybrid, and 11% Remote job distribution.

Senior Electrical Engineer - Contract to Hire $80-$150/hour

Presco Engineering

New Haven, CT • On-site

$80 - $150/hr

Contractor

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted 3 days ago

Job description

Do you want fast paced, exciting work in a great engineering environment? Presco is a 40-year-old design firm in New Haven, CT building teams for bio-medical electronics, scientific instruments, military power conversion, quantum computers, and a host of other electronic product development cycles.
Prominent technology companies outsource their most difficult design cycles to us. That's because the big firms are highly risk averse. Fearing possible failure, they won't try anything new or difficult, so they outsource the fun work to us. Presco's staff is expanding and we're seeking a senior electronic engineer with some or all of the following capabilities:
• Medium speed impedance controlled digital circuit design and layout. CPU, DDR memory, Flash. SPI, I2C, Ethernet and USB communications.
• Mixed analog/digital design: A/D and D/A converters.
• FPGA design and test bench development in VHDL. Unit delay simulation, synthesis, timing constraints and die routing. Mostly Xilinx and Altera devices.
• On-board power supply design: buck and boost switching supplies, LDOs, power supply entry point filters. Device selection, simulation and layout.
• Analog design: small signal amplifiers, sensor front end, A/D drivers. Typically low to medium bandwidth. Noise analysis, Spice simulation, device selection.
Requirements
Ideal Capabilities
  • Electrical Engineering degree with 10+ years' experience
  • High speed digital and low noise analog design experience
  • FPGA Design
  • Power electronics experience
  • Familiar with schematic capture and layout
  • BOM & ECO management experience
  • SPICE, Altium and MathWorks

Benefits
  • Health Care Plan (Medical, Dental & Vision)
  • Retirement Plan (401k)
  • Life Insurance (Basic, Voluntary & AD&D)
  • Paid Time Off (Vacation, Sick & Public Holidays)
  • Family Leave (Maternity, Paternity)
  • Short Term & Long Term Disability
  • Training & Development
  • Hybrid Work Schedule

Apply