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Ic Layout Mask Designer Jobs in California (NOW HIRING)

SpaceX

RFIC Layout Designer (RFIC Engineering)

Irvine, CA · On-site

$120K - $170K/yr

You will be an integral part of the IC design team and lead the discipline of layout at the technical level, and will work with RFIC/mixed signal designers on full chip layout of custom analog and ...

MediaTek Research Lab Inc.

IC Layout engineer

Irvine, CA · On-site

$85.90 - $137.50/hr

Position Analog Layout Engineer, Analog Design and Circuit Technology, Irvine, California. Responsibilities * Work closely with the design team to develop high‑quality layouts for product ...

Micron Technology

Staff Layout Designer

San Jose, CA · On-site

$72 - $122/hr

As a Staff Layout Designer, you will develop and prepare multi-dimensional layouts. You will ... IC layout design experience with NAND, DRAM and/or SRAM * Programming skills and AI experience ...

Micron

Staff Layout Designer

San Jose, CA

$72 - $122/hr

As a Staff Layout Designer, you will develop and prepare multi-dimensional layouts. You will ... IC layout design experience with NAND, DRAM and/or SRAM * Programming skills and AI experience ...

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Ic Layout Mask Designer information

What does an IC Layout Mask Designer do?

An IC Layout Mask Designer creates the physical design of integrated circuits (ICs) by translating circuit schematics into precise geometric patterns. These patterns are used to fabricate semiconductor chips via photolithography. The role involves ensuring circuit performance, optimizing layouts for electrical and manufacturability requirements, and working closely with design and fabrication teams. Proficiency in EDA tools, design rules, and CMOS technology is essential.

What are the key skills and qualifications needed to thrive as an IC Layout Mask Designer?

To thrive as an IC Layout Mask Designer, you need a solid background in semiconductor physics, electronic circuit design, and proficiency with CAD tools such as Cadence Virtuoso or Mentor Graphics. Experience with industry-standard IC layout design and verification tools, as well as knowledge of relevant process design rules, is highly valued. Strong attention to detail, problem-solving capabilities, and the ability to collaborate across multidisciplinary teams are key soft skills for this role. These competencies are essential to ensure accuracy, manufacturability, and performance in complex integrated circuit designs.

What are some common challenges faced by IC Layout Mask Designers in their daily work?

IC Layout Mask Designers often face challenges such as managing complex design constraints, optimizing layouts for manufacturability, and ensuring strict adherence to foundry design rules. Balancing performance, area, and power requirements while coordinating closely with circuit and verification engineers can add to the complexity. Staying updated with evolving semiconductor processes and continually learning new layout techniques are also important aspects of the role. Despite these challenges, many designers find the work rewarding due to the impact their contributions have on innovative electronics products.

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Infographic showing various Ic Layout Mask Designer job openings in California as of August 2026, with employment types broken down into 100% Full Time. Highlights an 100% In-person job distribution.

RFIC Layout Designer (RFIC Engineering)

United States Digital Space LLC

Palo Alto, CA • On-site

$120 - $180/hr

Other

Posted 8 days ago

Job description

the company was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today the company is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.

RFIC LAYOUT DESIGNER (RFIC ENGINEERING)

At the company we’re leveraging our experience in building rockets and spacecraft to deploy Starlink, the world’s most advanced broadband internet system. Starlink is the world’s largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system – thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We’ve only begun to scratch the surface of Starlink’s potential global impact and are looking for best-in-class engineers to help maximize Starlink’s utility for communities and businesses around the globe.

RESPONSIBILITIES:
  • Work with the integrated circuit designers and chip leads to determine the chip floor plan; this includes strategies for power and ground distribution as well as working with packaging engineer to determine pad locations
  • Accurately estimate the schedule for the layout work and identify areas of complexity that need early investigation
  • Perform layout of custom RF and analog circuit blocks with attention to matching and minimizing parasitic capacitance in the layout
  • Perform design rule checking, electrical rule checking and layout versus schematic checks and resolve errors
  • Perform top-level layout integration with electrostatic discharge structures and pad assembly and perform final tape out (including density fill, running design for manufacturability checks and sharing GDS with the foundry)
  • Work with EDA suppliers to trial new tools and features
  • Generate guides and demos for others in the team to showcase improvements in layout technique
BASIC QUALIFICATIONS:
  • Bachelor’s degree in electrical or computer engineering and 1+ years of professional experience as an IC layout designer; OR 3+ years of professional experience with integrated circuit layout design in lieu of a degree
PREFERRED SKILLS AND EXPERIENCE:
  • Strong analog layout skills
  • Experience in advanced node IC layouts such as 22nm, 16nm, 7nm, 5nm or below
  • Experience in layout of circuits with frequencies up to 50GHz
  • Experience in layout of sensitive RF blocks such as low noise amplifiers, voltage controlled oscillators and mixers
  • Experience with skill programming
  • Experience with shell scripting, Perl, Python or similar language
  • Experience managing revision control systems
  • Experience with circuit design
  • Understanding of layout considerations for device matching, coupling and noise isolation
  • Working knowledge of Linux
  • Excellent communication skills (both oral and written) are required
  • Able to work independently on challenging problems
ADDITIONAL REQUIREMENTS:
  • Must be willing to work extended hours and weekends as needed to meet critical milestones
ITAR REQUIREMENTS:
  • To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.

the company is an Equal Opportunity Employer; employment with the company is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

Applicants wishing to view a copy of the company’s Affimitive Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to hr@unitedstatesdigital.space.

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