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Hourly Emulation Engineer Jobs in Texas (NOW HIRING)

Meta

ASIC Engineer, Implementation - Timing

Austin, TX

$146K/yr

Work closely with the Design Engineers, DV Engineers, Emulation Engineers in supporting them with ... Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual ...

Meta

ASIC Engineer, Design Verification

Austin, TX · On-site +1

$178K/yr

Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams ... Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual ...

Meta

ASIC Engineer, Design Verification

Austin, TX

$114K/yr

Along with traditional simulation, you will be using other approaches like Formal and Emulation to ... Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual ...

All JobsHourly Emulation Engineer JobsHourly Emulation Engineer Jobs in Texas

Hourly Emulation Engineer information

What is the difference between Hourly Emulation Engineer vs Hardware Test Engineer?

AspectHourly Emulation EngineerHardware Test Engineer
Required CredentialsBachelor's in Electrical Engineering or related; experience with emulation toolsBachelor's in Electrical Engineering or related; experience with hardware testing
Work EnvironmentDesign labs, emulation platforms, simulation environmentsManufacturing floors, testing labs, hardware validation setups
Employer & Industry UsageSemiconductor, electronics design companies, chip manufacturersElectronics manufacturing, consumer electronics, hardware development
Common Search & ComparisonYes, often compared for hardware validation rolesYes, similar in hardware testing focus

Hourly Emulation Engineers focus on developing and validating hardware designs using emulation tools, while Hardware Test Engineers primarily perform physical testing and validation of hardware products. Both roles require technical expertise in electronics, but differ in their methods and environments.

What are the most commonly searched types of Emulation Engineer jobs in Texas? The most popular types of Emulation Engineer jobs in Texas are:
What are popular job titles related to Hourly Emulation Engineer jobs in Texas? For Hourly Emulation Engineer jobs in Texas, the most frequently searched job titles are:
What job categories do people searching Hourly Emulation Engineer jobs in Texas look for? The top searched job categories for Hourly Emulation Engineer jobs in Texas are:
What cities in Texas are hiring for Hourly Emulation Engineer jobs? Cities in Texas with the most Hourly Emulation Engineer job openings:
Hourly Emulation Engineer jobs near you
Infographic showing various Hourly Emulation Engineer job openings in Texas as of July 2026, with employment types broken down into 43% Locum Tenens, 2% As Needed, 43% Full Time, 3% Part Time, 1% Contract, and 8% Nights. Highlights an 87% Physical, 5% Hybrid, and 8% Remote job distribution.

ASIC Engineer, Implementation - Timing

Meta

Austin, TX

$146K/yr

Full-time

Posted 8 days ago

Meta rating

7.8

Company rating: 7.8 out of 10

Based on 45 frontline employees who took The Breakroom Quiz

135th of 241 rated software companies

Job description

Meta's Silicon Engineering team is building custom silicon solutions that power the infrastructure behind Meta's AI and data center workloads at scale. As an ASIC Engineer focused on Implementation, you will drive the physical realization of complex custom chips from RTL through tapeout, working across synthesis, place-and-route, timing closure, and signoff. In this role, you will collaborate with architecture, design, and verification teams to deliver high-performance, power-efficient silicon that meets aggressive PPA targets for Meta's next-generation infrastructure platforms.
ASIC Engineer, Implementation - Timing Responsibilities:
  • Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA for the blocks and the top-level including SOC. Analyze the inter-block timing and come up with IO budgets for the various partition blocks
  • Develop SOC Timing Full chip Flat & Hierarchical Constraints for Functional & DFT Modes
  • Perform STA for full chip and Physical partition blocks using PrimeTime
  • Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for Timing, Area, Power
  • Developing Automation scripts and Methodology for all FE-tools including ( Synthesis, STA)
  • Work closely with the Design Engineers, DV Engineers, Emulation Engineers in supporting them with the handoff tasks
  • Interact with Physical Design Engineers and provide them with timing/congestion feedback

Minimum Qualifications:
  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
  • 6+ years of experience with Timing Analysis
  • Experience with developing full chip flat & hierarchical timing constraints
  • Experience with AOCV/POCV timing analysis , SI noise analysis
  • Experience with running Static Timing Analysis for full chip using DMSA
  • Knowledge of front-end and back-end ASIC flows
  • Experience with communicating across functional internal teams and vendors

Preferred Qualifications:
  • Experience with SOC Design Integration & Front End Implementation
  • Experience with Back End PD tools such as Fusion Compiler, Innovus
  • Experience with Front End Synthesis tools such as Design Compiler, Genus

About Meta:
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.
Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.
Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@meta.com.
$146,000/year to $209,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.

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