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Hardware Verification Engineer Jobs (NOW HIRING)

GPU Design Verification Engineer

Orlando, FL · On-site

$127K - $155K/yr

The people who work here have reinvented entire industries with all Apple Hardware products. The ... Description As a Senior Graphics Core Hardware Verification Engineer, you will be tasked with the ...

GPU Design Verification Engineer

Orlando, FL

$127K - $155K/yr

The people who work here have reinvented entire industries with all Apple Hardware products. The ... Description As a Senior Graphics Core Hardware Verification Engineer, you will be tasked with the ...

Verification Engineer

Saratoga, CA · On-site

$195K - $265K/yr

About Eridu Eridu is a Silicon Valley-based hardware startup pioneering infrastructure solutions ... Engineering, or related field. * Experience: A MINIMUM of 8-15 years in ASIC verification in the ...

Design Verification Engineer

Santa Clara, CA · On-site

$159K - $195K/yr

We look for engineers who think algorithmically, write clean code, and are excited to apply the ... Continuously build depth in hardware design, verification methodology, and the chip development ...

... Verification Engineer with a background in AC and/or RF technology, test development, and/or ... C, C++, C# preferred • Experience in a lab setting, debugging hardware, software, and product ...

Electronics Verification Engineer The Electronics Verification Engineer validates and qualifies ... Validate and qualify electronic hardware from prototype through production, ensuring compliance ...

The people who work here have reinvented entire industries with all Apple Hardware products. The ... Description As a CPU Design Verification Engineer owning the verification of a certain area of ...

FPGA Engineer

Melbourne, FL · On-site

$120K - $154K/yr

Skills MATRIX Required Skills Years of experience Hardware Verification System Verilog and/or UVM ... Expert‑level verification engineer with strong SystemVerilog and/ or UVM experience or * FPGA ...

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Hardware Verification Engineer information

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$51K

$146.2K

$196.5K

How much do hardware verification engineer jobs pay per year?

As of Jul 15, 2026, the average yearly pay for hardware verification engineer in the United States is $146,230.00, according to ZipRecruiter salary data. Most workers in this role earn between $123,500.00 and $163,000.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive in the Hardware Verification Engineer position, and why are they important?

To thrive as a Hardware Verification Engineer, you need a solid background in digital design, computer architecture, and verification methodologies, typically supported by a degree in electrical engineering or a related field. Familiarity with hardware description languages (HDLs) like Verilog or VHDL, simulation tools such as ModelSim, and methodologies like UVM is essential. Strong analytical thinking, attention to detail, and effective communication skills are vital for collaborating with design teams and debugging complex systems. These skills and qualities are crucial to ensure that hardware products meet performance, functionality, and reliability standards before production.

What are typical daily responsibilities for a Hardware Verification Engineer?

As a Hardware Verification Engineer, your daily responsibilities often include developing and executing test plans, writing verification code using HDLs, running simulations, and analyzing results to identify and resolve design issues. You’ll collaborate closely with design engineers to understand the architecture and specifications, and work with other verification team members to ensure thorough coverage of all test scenarios. The role may also involve documenting findings, participating in design reviews, and using advanced verification methodologies to improve the efficiency and accuracy of test processes. This combination of technical and collaborative work makes the position dynamic and impactful in ensuring high-quality hardware products.

What is a Hardware Verification Engineer job?

A Hardware Verification Engineer is responsible for ensuring that semiconductor chips and hardware designs function correctly before manufacturing. They develop and execute testbenches, write verification plans, and use tools like SystemVerilog and UVM to simulate and validate designs. Their job involves debugging issues, writing test cases, and collaborating with design engineers to ensure the final product meets specifications. This role is crucial in preventing costly errors in hardware production and ensuring high reliability in electronic devices.

More about Hardware Verification Engineer jobs
What cities are hiring for Hardware Verification Engineer jobs? Cities with the most Hardware Verification Engineer job openings:
What are the most commonly searched types of Hardware Verification Engineer jobs? The most popular types of Hardware Verification Engineer jobs are:
What states have the most Hardware Verification Engineer jobs? States with the most job openings for Hardware Verification Engineer jobs include:
What job categories do people searching Hardware Verification Engineer jobs look for? The top searched job categories for Hardware Verification Engineer jobs are:
Infographic showing various Hardware Verification Engineer job openings in the United States as of July 2026, with employment types broken down into 95% Full Time, 2% Part Time, and 3% Contract. Highlights an 87% Physical, 4% Hybrid, and 9% Remote job distribution, with an average salary of $146,230 per year, or $70.3 per hour.
Principal ASIC Verification Engineer

Principal ASIC Verification Engineer

Cornelis Networks

Austin, TX • On-site

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted 10 days ago


Job description

At Cornelis we're building the future of AI and HPC networking with an AI-first approach to silicon and software development. We're seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from chip architecture to system performance at scale.
At Cornelis we're building the future of AI and HPC networking with an AI-first approach to silicon and software development. We're seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from chip architecture to system performance at scale.
Cornelis Networks delivers the world's highest performance scale-out networking solutions for AI and HPC datacenters. Our differentiated architecture seamlessly integrates hardware, software and system level technologies to maximize the efficiency of GPU, CPU and accelerator-based compute clusters at any scale. Our solutions drive breakthroughs in AI & HPC workloads, empowering our customers to push the boundaries of innovation. Backed by top-tier venture capital and strategic investors, we are committed to innovation, performance and scalability - solving the world's most demanding computational challenges with our next-generation networking solutions.
We are a fast-growing, forward-thinking team of architects, engineers, and business professionals with a proven track record of building successful products and companies. As a global organization, our team spans multiple U.S. states and six countries, and we continue to expand with exceptional talent in onsite, hybrid, and fully remote roles.
Cornelis Networks is hiring a Principal ASIC Verification Engineer with advanced skills and knowledge in key areas required to verify world-class SoCs to be deployed in high performance computing, high performance data analytics, and artificial intelligence interconnect solutions. As a member of the ASIC leadership team with hands-on technical experience, you will be responsible for the verification closure of entire projects, including design modules, sub-systems, and SoCs. You will drive a wide range of activities including test-planning, UVM based testbench development, regression and coverage closure. You will have the opportunity to partner and collaborate with ASIC design, emulation, system hardware and post-silicon teams and help create a first-pass silicon success. A preferred candidate will have 10 + years of relevant experience in networking hardware verification, proven expertise in verifying one or more of the following: 50G, 100G, 400G Ethernet MAC/PCS protocols, UDP, TCP/IP, RDMA/RoCE, IPSec. and their application in high-speed data processing/networking. Experience utilizing AI tools to generate test plans and improve the productivity of verification process and team is highly desirable.
Key Technical Responsibilities:
  • Define overall SOC level verification strategy, technical planning, direction
  • Enable and drive the development of UVM environments to verify RTL at block, unit, and SoC levels
  • Develop and execute functional tests according to verification test plans
  • Instrument TB for functional and code coverage and drive to closure based on the coverage metrics
  • Collaborate with cross-functional teams like design, software, emulation and silicon validation teams towards ensuring the highest design quality

Team Responsibilities:
  • Day-to-day guidance and leadership of team members
  • Driving results via mentoring, coaching, and counseling
  • Education of team in the use of AI tools to enhance productivity and efficiencies
  • Generation and enforcement of coding and verification guidelines

Minimum Qualifications:
  • 15 + years of experience with the following:
  • Hands-on experience with writing code using UVM/System Verilog
  • Verification for complex SoCs that include multiple clock and reset domains, using VCS or equivalent simulation tools
  • Debugging fails to the line of RTL, closing out bug fixes, using Verdi or equivalent debug tools
  • Experience in ground up testbench development
  • Experience with revision control systems like Git or SVN etc.
  • B.S. Degree in Computer Engineering, Computer Science, or Electrical Engineering

Preferred Qualifications:
  • M.S. Degree in Computer Engineering, Computer Science, or Electrical Engineering
  • 15 + years of relevant experience in networking hardware verification, proven expertise in verifying 50G, 100G, 400G Ethernet MAC/PCS protocols, TCP/IP, RDMA/RoCE, IPSec. and their application in high-speed data processing/networking
  • One or more scripting languages (TCL, Python, Perl, Shell-scripting)
  • Track record of first-pass success in ASIC and Systems

Location: This is a remote position for employees residing within the United States.
We offer a competitive compensation package that includes equity, cash, and incentives, along with health and retirement benefits. Our dynamic, flexible work environment provides the opportunity to collaborate with some of the most influential names in the semiconductor industry.
At Cornelis Networks your base salary is only one component of your comprehensive total rewards package. Your base pay will be determined by factors such as your skills, qualifications, experience, and location relative to the hiring range for the position. Depending on your role, you may also be eligible for performance-based incentives, including an annual bonus or sales incentives.
In addition to your base pay, you'll have access to a broad range of benefits, including medical, dental, and vision coverage, as well as disability and life insurance, a dependent care flexible spending account, accidental injury insurance, and pet insurance. We also offer generous paid holidays, 401(k) with company match, and Open Time Off (OTO) for regular full-time exempt employees. Other paid time off benefits include sick time, bonding leave, and pregnancy disability leave.
Cornelis Networks does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. Cornelis Networks is an equal opportunity employer, and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity or expression, pregnancy, age, national origin, disability status, genetic information, protected veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.