... design and verification expertise to verify complex digital designs, with a specific focus on TPU ... We empower Google customers with breakthrough capabilities and insights by delivering AI and ...
... design and verification expertise to verify complex digital designs, with a specific focus on TPU ... We empower Google customers with breakthrough capabilities and insights by delivering AI and ...
ASIC Design Verification Engineer
Mountain View, CA · On-site
$175K - $215K/yr
Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the ... Partner with design and architecture teams to translate hardware specifications into comprehensive ...
ASIC Design Verification Engineer
Mountain View, CA · On-site
$175K - $215K/yr
Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the ... Partner with design and architecture teams to translate hardware specifications into comprehensive ...
... design verification. * Experience with SystemVerilog or Verilog. * Experience working with one or ... As an ASIC Formal Verification Engineer, you will contribute formal verification expertise to ...
... design verification. * Experience with SystemVerilog or Verilog. * Experience working with one or ... As an ASIC Formal Verification Engineer, you will contribute formal verification expertise to ...
Staff Silicon Physical Design Engineer, Quantum AI
Mountain View, CA · On-site
$160K - $165K/yr
Experience in package design and SI/PI analysis and strategies. * Experience with pre-silicon and ... Google . Responsibilities * Own the development and maintenance of an industry-standard ASIC ...
Staff Silicon Physical Design Engineer, Quantum AI
Mountain View, CA · On-site
$160K - $165K/yr
Experience in package design and SI/PI analysis and strategies. * Experience with pre-silicon and ... Google . Responsibilities * Own the development and maintenance of an industry-standard ASIC ...
Silicon System and Software Integration Engineer, TPU Cloud
Sunnyvale, CA · On-site
$122K - $164K/yr
... ASIC design, or verification. * Experience with hardware and software integration or validation ... We empower Google customers with breakthrough capabilities and insights by delivering AI and ...
New
Silicon System and Software Integration Engineer, TPU Cloud
Sunnyvale, CA · On-site
$122K - $164K/yr
... ASIC design, or verification. * Experience with hardware and software integration or validation ... We empower Google customers with breakthrough capabilities and insights by delivering AI and ...
New
... and design, and assisting in the hardware and lab bring up and verification of our ASIC systems.The AI and Infrastructure team is redefining what's possible. We empower Google customers with ...
... and design, and assisting in the hardware and lab bring up and verification of our ASIC systems.The AI and Infrastructure team is redefining what's possible. We empower Google customers with ...
Silicon System and Software Integration Engineer, TPU
Sunnyvale, CA · On-site
$122K - $164K/yr
... ASIC design or verification, or integration and enablement of first- or third-party IP ... We empower Google customers with breakthrough capabilities and insights by delivering AI and ...
New
Silicon System and Software Integration Engineer, TPU
Sunnyvale, CA · On-site
$122K - $164K/yr
... ASIC design or verification, or integration and enablement of first- or third-party IP ... We empower Google customers with breakthrough capabilities and insights by delivering AI and ...
New
... ASIC engineers. As a Soc Design Engineer on the TPU team, you will be a key contributor to the development of Google's AI accelerators. You will leverage your expertise in digital logic design ...
... ASIC engineers. As a Soc Design Engineer on the TPU team, you will be a key contributor to the development of Google's AI accelerators. You will leverage your expertise in digital logic design ...
... or ASIC/SoC design. * Experience with SystemVerilog Assertions (SVA) and formal verification ... We empower Google customers with breakthrough capabilities and insights by delivering AI and ...
... or ASIC/SoC design. * Experience with SystemVerilog Assertions (SVA) and formal verification ... We empower Google customers with breakthrough capabilities and insights by delivering AI and ...
Senior Physical Design Flow and Methodology Engineer
Sunnyvale, CA · On-site
$159K - $164K/yr
... ASIC tapeouts. The AI and Infrastructure team is redefining what's possible. We empower Google ... Collaborate with chip design teams to implement tools and methodologies for physical design in ...
Senior Physical Design Flow and Methodology Engineer
Sunnyvale, CA · On-site
$159K - $164K/yr
... ASIC tapeouts. The AI and Infrastructure team is redefining what's possible. We empower Google ... Collaborate with chip design teams to implement tools and methodologies for physical design in ...
... ASIC engineers. In this role, you will be a key contributor to the development of Google's AI accelerators. You will leverage your expertise in digital logic design, computer architecture, and RTL ...
... ASIC engineers. In this role, you will be a key contributor to the development of Google's AI accelerators. You will leverage your expertise in digital logic design, computer architecture, and RTL ...
CAD Engineer - Infrastructure
Seattle, WA · On-site
$230K - $323K/yr
Experience with cloud-based EDA infrastructure (AWS, Google Cloud, or Azure) * Background in high ... Experience supporting large ASIC design teams across multiple concurrent projects Compensation ...
CAD Engineer - Infrastructure
Seattle, WA · On-site
$230K - $323K/yr
Experience with cloud-based EDA infrastructure (AWS, Google Cloud, or Azure) * Background in high ... Experience supporting large ASIC design teams across multiple concurrent projects Compensation ...
CAD Engineer - Infrastructure
$230K - $323K/yr
Experience with cloud-based EDA infrastructure (AWS, Google Cloud, or Azure) * Background in high ... Experience supporting large ASIC design teams across multiple concurrent projects Compensation ...
CAD Engineer - Infrastructure
$230K - $323K/yr
Experience with cloud-based EDA infrastructure (AWS, Google Cloud, or Azure) * Background in high ... Experience supporting large ASIC design teams across multiple concurrent projects Compensation ...
Experience with ASIC design flows and methodology of static timing analysis. * Delivery of high ... Google's mission is to organize the world's information and make it universally accessible and ...
Experience with ASIC design flows and methodology of static timing analysis. * Delivery of high ... Google's mission is to organize the world's information and make it universally accessible and ...
... Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries ... design issues, and gain insight into the requirements for full ASIC test coverage. The AI and ...
... Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries ... design issues, and gain insight into the requirements for full ASIC test coverage. The AI and ...
... Google . Responsibilities * Work on their own to create and review Compute subsystem's design microarchitecture specifications. * Develop SystemVerilog RTL to implement logic for ASIC products ...
... Google . Responsibilities * Work on their own to create and review Compute subsystem's design microarchitecture specifications. * Develop SystemVerilog RTL to implement logic for ASIC products ...
Silicon Design Verification Engineer
Mountain View, CA · On-site
$160K - $195K/yr
Familiarity with ASIC standard interfaces and memory system architecture. About the job Be part of ... Google's mission is to organize the world's information and make it universally accessible and ...
Silicon Design Verification Engineer
Mountain View, CA · On-site
$160K - $195K/yr
Familiarity with ASIC standard interfaces and memory system architecture. About the job Be part of ... Google's mission is to organize the world's information and make it universally accessible and ...
Design Verification Engineer, Silicon
Mountain View, CA · On-site
$160K - $195K/yr
Familiarity with ASIC standard interfaces and memory system architecture. About the job Be part of ... Google's mission is to organize the world's information and make it universally accessible and ...
Design Verification Engineer, Silicon
Mountain View, CA · On-site
$160K - $195K/yr
Familiarity with ASIC standard interfaces and memory system architecture. About the job Be part of ... Google's mission is to organize the world's information and make it universally accessible and ...
... Google . Responsibilities * Understand the overall application of the chip, proposing and developing improvements in overall design. * Design and document one or more blocks of an ASIC, including ...
... Google . Responsibilities * Understand the overall application of the chip, proposing and developing improvements in overall design. * Design and document one or more blocks of an ASIC, including ...
... ASIC RTL design, with a focus on clocking, reset, or timing-critical RTL development. * Design ... We empower Google customers with breakthrough capabilities and insights by delivering AI and ...
... ASIC RTL design, with a focus on clocking, reset, or timing-critical RTL development. * Design ... We empower Google customers with breakthrough capabilities and insights by delivering AI and ...
Google Asic Design information
See salary details
$94K - $103.8K
16% of jobs
$103.8K - $113.6K
3% of jobs
$113.6K - $123.5K
4% of jobs
$126.3K is the 25th percentile. Wages below this are outliers.
$123.5K - $133.3K
6% of jobs
The median wage is $139.4K / yr.
$133.3K - $143.1K
33% of jobs
$143.1K - $152.9K
3% of jobs
$152.9K - $162.7K
2% of jobs
$169.2K is the 75th percentile. Wages above this are outliers.
$162.7K - $172.5K
12% of jobs
$172.5K - $182.4K
5% of jobs
$182.4K - $192.2K
4% of jobs
$192.2K - $202K
12% of jobs
$94K
$150.2K
$202K
How much do google asic design jobs pay per year?
What are the key skills and qualifications needed to thrive in the Google Asic Design position, and why are they important?
To thrive as a Google ASIC Design engineer, you need a solid background in electrical engineering, digital logic design, and experience with ASIC design methodologies. Proficiency with industry-standard EDA tools such as Synopsys, Cadence, or Mentor Graphics, along with scripting languages like Python or TCL, is essential, and a relevant certification or advanced degree can be advantageous. Strong analytical thinking, teamwork, and clear communication skills are highly valued in this role. These skills ensure high-quality, efficient chip designs that meet rigorous performance, power, and area requirements within a collaborative and fast-paced environment.
What is a Google ASIC Design job?
A Google ASIC Design job involves developing custom application-specific integrated circuits (ASICs) to optimize performance, power efficiency, and functionality for Google's hardware infrastructure. Engineers in this role work on architecture, design, verification, and testing of ASICs used in data centers, AI accelerators, and other specialized hardware. They collaborate with cross-functional teams to refine system requirements and ensure successful silicon implementation. Strong expertise in digital design, hardware description languages (HDLs) like Verilog or VHDL, and synthesis tools is essential.
What does the day-to-day work look like for a Google ASIC Design engineer?
As a Google ASIC Design engineer, your daily responsibilities typically involve defining microarchitectures, designing and verifying digital circuits, running design simulations, and collaborating closely with verification, software, and hardware teams. You’ll use advanced EDA tools to implement and optimize circuits, ensuring they meet strict specifications for power, performance, and area. Regular design reviews, cross-functional brainstorming sessions, and debugging activities are part of the routine. This collaborative environment fosters continual learning and innovation, providing opportunities for both technical growth and career advancement.

Full-time
Posted 15 hours ago
Google rating
8.8
Based on 94 frontline employees who took The Breakroom Quiz
32nd of 191 rated software companies
Job description
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 10 years of experience with verification methodologies and languages such as UVM and SystemVerilog.
- Experience developing and maintaining verification testbenches, test cases, and test environments.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience with universal verification methodology (UVM), SystemVerilog, or other scripting languages such as Python, Perl, Shell, Bash, etc.
- Knowledge of general purpose operating systems such as Linux and Android.
- Familiarity with ARM Instruction Set Architecture.
About the job
In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.
We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.
Individual pay is determined by factors including job-related skills, experience, and relevant education or training.
US: $192000 - $279000 (USD) 20% bonus target equity benefits
Learn more about benefits at Google .
Responsibilities
- Lead the functional verification team for significant portions of TPU designs, developing advanced functional verification infrastructure such as subchip, subsystem and fullchip level environments.
- Define and drive advanced verification strategies, including the use of simulation, for bug hunt, formal verification for corner-case bugs and emulation for system validation.
- Perform functional verification and performance validation for both pre-silicon and post-silicon phases.
- Work closely with front-end design, architecture, and performance teams to ensure architectural compliance and achievement of performance goals.
- Analyze coverage from various dimensions and develop monitors and checkers for quality assurance.
Information collected and processed as part of your Google Careers profile, and any job applications you choose to submit is subject to Google's Applicant and Candidate Privacy Policy .
Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire .
If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form .
Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.
To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.
Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.
About Google
Sourced by ZipRecruiter
Industry
Software development and technology, communication and media
Company size
10,000+ Employees
Headquarters location
Mountain View, CA, US