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Full Time Physical Design Engineer Jobs (NOW HIRING)

Mirafra Technology

Physical Design Engineer

San Diego, CA · On-site

$144K - $148K/yr

Job Overview: The Graphics team is looking for Experienced Physical Design Engineers to work on Adreno Graphics cores in the area of Physical Implementation. Responsibilities: The Physical ...

Etched

Physical Design Engineer

San Jose, CA · On-site

$200K - $300K/yr

  • Medical

  • Dental

  • Vision

Job Summary Etched is looking for exceptional Physical Design engineers to join our team. In this role, you will own block-level implementation and verification, drive timing closure and PPA ...

Etched

Physical Design Engineer

San Jose, CA · On-site

$200K - $300K/yr

  • Medical

  • Dental

  • Vision

Job Summary Etched is looking for exceptional Physical Design engineers to join our team. In this role, you will own block-level implementation and verification, drive timing closure and PPA ...

Noralogic Inc

Physical Design Engineer

Hillsboro, OR · On-site

$148K - $152K/yr

Physical Design Engineer Job Location: Hillsboro, OR Job Type ... Fulltime In this position, you will be developing and supporting mixed signal and custom digital ...

Mirafra Technology

Physical Design Engineer

San Diego, CA · On-site

$144K - $148K/yr

Physical Design Engineer Location : San Diego,CA Type : Full Time Job Overview: To do Floor ... planning, P&R, timing closure SI prevention/fixing, power planning, CTS, PV and I/R drop for Block ...

Xforia, Inc.

Physical Design Engineer

Sunnyvale, CA · On-site

$162K - $166K/yr

Physical Design Engineer Location: Sunnyvale, CA Note: Highlighted skills are must to have. JD: • 10+ years of hands-on experience for block level Implementation activities(Netlist to GDS II and ...

Broadcom

Physical Design Engineer

Colorado Springs, CO · On-site

$134K - $138K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

Broadcom is searching for a Physical IC Design Engineer to join the Data Center Solutions Group at our main campus in Colorado Springs, Colorado.This position involves working with the latest ...

Broadcom

Physical Design Engineer

San Jose, CA · On-site

$159K - $164K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

Broadcom is searching for a Physical IC Design Engineer to join the Data Center Solutions Group at our main campus in Colorado Springs, Colorado. This position involves working with the latest ...

Hudson River Trading

Physical Design Engineer

Austin, TX · On-site

$134K - $138K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Hudson River Trading (HRT) is seeking a Physical Design Engineer with a broad, versatile skillset to join our growing Hardware team. In this role, you will help deliver performance-critical ASICs and ...

Broadcom

Physical Design Engineer

San Jose, CA · On-site

$159K - $164K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

Broadcom is searching for a Physical IC Design Engineer to join the Data Center Solutions Group at our main campus in Colorado Springs, Colorado.This position involves working with the latest ...

Ralliant

ASIC Physical Design Engineer

Boulder, CO · On-site

$141K - $145K/yr

ASIC Physical Design Engineer At Tektronix, we believe innovation starts with our customer. This approach has led us to a seventy-five-year history of delivering outstanding solutions to customers in ...

Broadcom

Physical Design Engineer

Colorado Springs, CO · On-site

$134K - $138K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

Broadcom is searching for a Physical IC Design Engineer to join the Data Center Solutions Group at our main campus in Colorado Springs, Colorado. This position involves working with the latest ...

United Airlines

Senior Physical Design Engineer

Santa Clara, CA

$82K - $193K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Your role As a Physical Design Engineer, you will support the implementation and optimization of ... Capgemini offers a comprehensive, non-negotiable benefits package to all regular, full-time ...

Altera

Physical Design Engineer

San Jose, CA

$133K - $192K/yr

About the Role We are seeking a Physical Design Engineer to join our Silicon Engineering and Physical Design organization. In this role, you will be responsible for implementing advanced custom IP ...

Apple

CPU Physical Design Engineer

Beaverton, OR · On-site

$141K - $145K/yr

Description As a CPU Physical Design Engineer, you will drive or participate in the following: • Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools targeting ...

Intelliswift Software

Physical Design Engineer

Phoenix, AZ · On-site

$135K - $139K/yr

Python Programming Language - * Physical Design Develop & own physical design implementation of multi-hierarchy low-power designs including physical-aware logic synthesis, design for testability ...

Apple

CPU Physical Design Engineer

Beaverton, OR · On-site

$141K - $145K/yr

Description As a CPU Physical Design Engineer, you will drive or participate in the following: • Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools targeting ...

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Full Time Physical Design Engineer information

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$95K

$141.5K

How much do full time physical design engineer jobs pay per year?

As of Aug 19, 2026, the average yearly pay for full time physical design engineer in the United States is $139,408.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $140,000.00 per year, depending on experience, location, and employer.

What is the difference between Full Time Physical Design Engineer vs Digital IC Design Engineer?

AspectFull Time Physical Design EngineerDigital IC Design Engineer
Primary FocusPhysical implementation, layout, timing, power optimizationLogic design, architecture, HDL coding, functional verification
Skills & CertificationsEDA tools, CMOS fabrication, timing analysisHDL languages (Verilog/VHDL), digital design principles
Work EnvironmentASIC/SoC design teams, EDA tool suitesDesign teams, simulation environments

Full Time Physical Design Engineers focus on the physical implementation of integrated circuits, ensuring optimal layout and timing. Digital IC Design Engineers concentrate on creating and verifying digital logic designs. While both roles require knowledge of digital design, physical design emphasizes layout and fabrication considerations, making them distinct yet complementary roles in chip development.

What cities are hiring for Full Time Physical Design Engineer jobs?

Cities with the most Full Time Physical Design Engineer job openings:

What are the most commonly searched types of Physical Design Engineer jobs?

The most popular types of Physical Design Engineer jobs are:

What states have the most Full Time Physical Design Engineer jobs?

States with the most job openings for Full Time Physical Design Engineer jobs include:

Full Time Physical Design Engineer jobs near you

Physical Design Engineer

Mirafra Technology

San Diego, CA • On-site

$144K - $148K/yr

Full-time

Re-posted 9 days ago

Job description

Company Description

Mirafra is a global product engineering services company with expertise in semiconductor design, embedded and application software.

Job Description

Job Overview:
The Graphics team is looking for Experienced Physical Design Engineers to work on Adreno Graphics cores in the area of Physical Implementation.
Responsibilities:
The Physical Implementation Engineer will work in Qualcomms Adreno GPU team and will be responsible for all the P&R experiments targeted at validating new flows/methodologies.

Minimum Qualifications:
Able to deal with MSM Top level complexity from FP, Placement, CTS, Routing and timing closure Must be
able to take the Hardmacro through P&R from Netlist to GDS including timing closure, formal and Physical verification.

Tools: EDA Physical design tools experience ( Examples: Cadence Innovas, Synopsys ICC2,  PrimetimeSi/Calibre/ etc)


Skills:

Physical design implementation expertize in latest technology nodes in one of the below domains or all of these.


1.Floor planning at Full chip level or Macro or Block Level

a.Macro placement, power grid implementation, power routing, special routing like analog signals etc

b.Power collapse/Low power implementation flow

2.P&R:
Place and route at chip level or block level, perform placement, timing closure in P&R mode, perform clock tree synthesis , routing etc

3.Timing closure/STA

a.Perform STA using primetime Si or Tempus or any industry standard STA engine, timing closure, ECO generation, timing correlation

b.Deep understanding of timing skills to perform correlation, timing fixes , corner/voltage definetions etc

4.Clock Tree Synthesis:

a.Perform custom or regular clock tree implementation at block level or top level.

b.Clock tree balance of complicated tree, clock power reduction techniques etc

5.Low Power Implementation

a.Power collapse/power gaing techniques/implementation

b.UPF/CPF flow knowledge

c.CLP/FV

6. Physical Verification Using Calibre a.Running all the PV checks (DRc/LVS/ERC/Softcheck ) and deep understanding of all the rules and fixes
7. Perl/Python/Shell script experience is also preferred to help with automation


Additional Information

All your information will be kept confidential according to EEO guidelines.

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