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Full Time Asic Rtl Design Engineer Jobs in Los Angeles, CA

If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. This is an exciting position in the world class ...

If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. This is an exciting position in the world class ...

If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. This is an exciting position in the world class ...

If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. This is an exciting position in the world class ...

... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. Description Develop signal processing intensive design for wireless communication SoCs ...

... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. Description Develop signal processing intensive design for wireless communication SoCs ...

RTL Design Engineer

Irvine, CA · On-site

$127K - $203K/yr

Broadcom's Central Engineering Group is seeking a candidate to lead the digital design and ... Design convergence to timing closure utilizing RTL optimization strategies. * Conduct formal ...

... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. Description Develop signal processing intensive design for wireless communication SoCs ...

... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. Description Develop signal processing intensive design for wireless communication SoCs ...

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Full Time Asic Rtl Design Engineer information

See Los Angeles, CA salary details

$101.3K

$161.8K

$217.7K

How much do full time asic rtl design engineer jobs pay per year?

As of Aug 23, 2026, the average yearly pay for full time asic rtl design engineer in Los Angeles, CA is $161,837.00, according to ZipRecruiter salary data. Most workers in this role earn between $141,700.00 and $194,000.00 per year, depending on experience, location, and employer.

What is a full time ASIC RTL design engineer?

Full Time ASIC RTL Design Engineers are professionals who specialize in designing digital circuits at the Register Transfer Level (RTL) for Application Specific Integrated Circuits (ASICs). They use hardware description languages like Verilog or VHDL to create, simulate, and verify complex digital systems that are manufactured as custom chips. Their work typically involves collaborating with other engineers to optimize performance, area, and power consumption, as well as ensuring that the design meets specified requirements. These engineers play a crucial role in the development of chips used in various applications, including consumer electronics, automotive systems, and telecommunications.

What are some common challenges full time ASIC RTL design engineers face when collaborating with verification teams?

A common challenge for ASIC RTL Design Engineers is ensuring that the design specifications are interpreted consistently between design and verification teams. Misalignment can lead to time-consuming bug fixes and delays in the project schedule. Effective communication, regular design reviews, and close collaboration are vital to catching issues early and maintaining project momentum. Additionally, engineers must often adapt quickly to evolving requirements or last-minute changes, which requires flexibility and strong problem-solving skills.

What are the key skills and qualifications needed to thrive as a full time ASIC RTL design engineer, and why are they important?

To thrive as a Full Time ASIC RTL Design Engineer, you need a solid background in digital logic design, computer architecture, and proficiency in Hardware Description Languages (HDLs) like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with EDA tools such as Synopsys, Cadence, or Mentor Graphics, and knowledge of simulation, synthesis, and timing analysis, are crucial, with some roles requiring verification or DFT experience. Strong analytical thinking, attention to detail, and effective communication skills set exceptional engineers apart in team environments. These skills and qualities are essential for creating reliable, efficient hardware designs and ensuring successful silicon implementations in a competitive technology landscape.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in Los Angeles, CA?

The most popular types of Asic Rtl Design Engineer jobs in Los Angeles, CA are:

What are popular job titles related to Full Time Asic Rtl Design Engineer jobs in Los Angeles, CA?

For Full Time Asic Rtl Design Engineer jobs in Los Angeles, CA, the most frequently searched job titles are:

What job categories do people searching Full Time Asic Rtl Design Engineer jobs in Los Angeles, CA look for?

The top searched job categories for Full Time Asic Rtl Design Engineer jobs in Los Angeles, CA are:

Infographic showing various Full Time Asic Rtl Design Engineer job openings in Los Angeles, CA as of August 2026, with employment types broken down into 1% Internship, 86% Full Time, 8% Part Time, and 5% Contract. Highlights an 85% Physical, 5% Hybrid, and 10% Remote job distribution, with an average salary of $161,837 per year, or $77.8 per hour.

RTL Design Engineer (Silicon Engineering)

SpaceX

Irvine, CA • On-site

$145K - $195K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted 8 days ago


SpaceX rating

8.7

Company rating: 8.7 out of 10

Based on 149 frontline employees who took The Breakroom Quiz

17th of 72 rated aerospace companies


Job description

RTL DESIGN ENGINEER (SILICON ENGINEERING) 

At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system - thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact and are looking for best-in-class engineers to help maximize Starlink's utility for communities and businesses around the globe. 

We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation FPGAs and ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.   

RESPONSIBILITIES:

  • Design ASICs and/or FPGAs for Starlink projects, implementing IP for complex SoCs and participate in integration tasks using Verilog/SystemVerilog
  • Participate in the full ASIC/FPGA design lifecycle for Starlink projects, from high-level conceptual and architectural discussions through microarchitecture, design partitioning, and collaboration with backend/implementation teams, and assist in lab bring-up and validation
  • Engage in high-level architectural design for FPGA and ASICs
  • Collaborate with cross-functional engineers in developing new technologies for the Starlink program impacting User terminals, Satellites, and more

BASIC QUALIFICATIONS:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or Physics
  • 1+ years of experience in RTL Design using SystemVerilog, Verilog or VHDL

PREFERRED SKILLS AND EXPERIENCE:

  • Master's in Electrical/Computer Engineering or related field
  • ASIC/FPGA system integration experience
  • Proficiency in Python for scripting
  • Experience in designing DSP or digital communication system datapath blocks
  • Experience with EDA tools such as HDL simulators
  • Experience and understanding of AXI/AHB/APB protocols
  • Strong foundation in electrical engineering fundamentals
  • Ability to work in a dynamic environment with changing needs and requirements
  • Team-player, can-do attitude and ability to work well in a group environment while still contributing on an individual basis
  • Demonstrated ability to work in a highly cross-functional role
  • Enjoys being challenged and learning new skills

ADDITIONAL REQUIREMENTS:

  • Ability to work extended hours or weekends as needed for mission critical deadlines

COMPENSATION & BENEFITS:    

Pay range:    

ASIC Design Engineer/Level I: $125,000.00 - $145,000.00/per year    
ASIC Design Engineer/Level II: $145,000.00 - $195,000.00/per year    

Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.

Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock, stock options, or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation & will be eligible for 10 or more paid holidays per year. Exempt employees are eligible for 5 days of sick leave per year.


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About SpaceX

Sourced by ZipRecruiter

Industry

Aerospace product and parts manufacturing, data services, guided missile and space vehicle manufacturing and satellite telecommunications

Company size

1,001 - 5,000 Employees

Headquarters location

Hawthorne, CA, US