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Full Chip Integration Engineer Analog Jobs (NOW HIRING)

Digital Design Engineer

Irvine, CA · On-site

$110K - $140K/yr

... digital/analog engineers for system integration and validation * Work with physical design teams on floor planning, timing closure, and DFT implementation * Perform full-chip integration and ...

Sr. Digital Design Engineer

Irvine, CA · On-site

$120K - $150K/yr

Work with CIS project lead, sensor digital & analog engineers for system integration & validation * Work with back-end team closely in floor planning, timing closure, and DFT. * Full-chip integration ...

Digital Design Engineer

Irvine, CA · On-site

$110K - $140K/yr

... digital/analog engineers for system integration and validation * Work with physical design teams on floor planning, timing closure, and DFT implementation * Perform full-chip integration and ...

Digital Design Engineer

Irvine, CA · On-site

$110K - $140K/yr

... digital/analog engineers for system integration and validation * Work with physical design teams on floor planning, timing closure, and DFT implementation * Perform full-chip integration and ...

... digital/analog engineers for system integration and validation * Work with physical design teams on floor planning, timing closure, and DFT implementation * Perform full-chip integration and ...

... digital/analog engineers for system integration and validation * Work with physical design teams on floor planning, timing closure, and DFT implementation * Perform full-chip integration and ...

... digital/analog engineers for system integration and validation * Work with physical design teams on floor planning, timing closure, and DFT implementation * Perform full-chip integration and ...

... digital/analog engineers for system integration and validation * Work with physical design teams on floor planning, timing closure, and DFT implementation * Perform full-chip integration and ...

... digital/analog engineers for system integration and validation * Work with physical design teams on floor planning, timing closure, and DFT implementation * Perform full-chip integration and ...

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Full Chip Integration Engineer Analog information

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How much do full chip integration engineer analog jobs pay per hour?

As of Sep 10, 2026, the average hourly pay for full chip integration engineer analog in the United States is $58.21, according to ZipRecruiter salary data. Most workers in this role earn between $45.43 and $71.15 per hour, depending on experience, location, and employer.

What are popular job titles related to Full Chip Integration Engineer Analog jobs?

For Full Chip Integration Engineer Analog jobs, the most frequently searched job titles are:

Digital Design Engineer

Irvine, CA • On-site

OMNIVISION
Software Development • 1 - 5K employees

$110K - $140K/yr

Full-time

Re-posted 29 days ago


Job description

Description
Key Responsibilities:
  • Design and implement sensor timing control logic and contribute to ISP system-level integration
  • Participate in chip-level architecture definition, including analog interfaces, control logic, image data processing pipelines, and power/performance/area (PPA) trade-offs
  • Integrate and validate ISP data paths based on PRD, design specifications, and overall SoC architecture
  • Collaborate closely with CIS project leads and sensor digital/analog engineers for system integration and validation
  • Work with physical design teams on floor planning, timing closure, and DFT implementation
  • Perform full-chip integration and verification
  • Support chip bring-up, validation, and silicon debugging
  • Collaborate with algorithm and application engineers on image tuning, optimization, and qualification
  • Support silicon validation, debugging, and image quality tuning through production readiness

Minimum Qualifications
  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a closely related field, or equivalent practical experience
  • At least 2 years of hands-on experience designing RTL digital logic using Verilog/System Verilog, or equivalent industry experience
  • Proficiency with scripting languages such as Python or Perl to support design, verification, and automation workflows
  • Experience analyzing and optimizing area, power, and performance (PPA) trade-offs in digital designs

Preferred Qualifications
  • Master's degree or PhD in Electrical Engineering, Computer Engineering, or a related discipline
  • Strong background in image sensor and camera system design or integration
  • Experience with high-speed MIPI interfaces (e.g., CSI-2 / D-PHY / C-PHY)
  • Practical experience with Image Signal Processing (ISP) architectures and pipelines

Annual base salary for this role in California, US is expected to be between $110,600 - $140,000. Actual pay will be determined on several factors such as relevant skills and experience, and the pay of employees in the similar role.
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