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Analog Chip Design Engineer Jobs (NOW HIRING)

OmniVision Technologies

Analog Design Engineer

Irvine, CA · On-site

$125K - $135K/yr

Work on whole chip floorplan design and pad frame; Work on analog and mixed signal circuits layout design by Cadence Virtuoso, such as column_array; Collaborate with layout engineer on whole chip ...

OMNIVISION

Analog Design Engineer

Irvine, CA

$125K - $135K/yr

Work on whole chip floorplan design and pad frame; Work on analog and mixed signal circuits layout design by Cadence Virtuoso, such as column_array; Collaborate with layout engineer on whole chip ...

OMNIVISION

Analog Design Engineer

Irvine, CA · On-site

$125K - $135K/yr

Work on whole chip floorplan design and pad frame; Work on analog and mixed signal circuits layout design by Cadence Virtuoso, such as column_array; Collaborate with layout engineer on whole chip ...

OMNIVISION

Analog Design Engineer

Irvine, CA · On-site

Work on whole chip floorplan design and pad frame; Work on analog and mixed signal circuits layout design by Cadence Virtuoso, such as column_array; Collaborate with layout engineer on whole chip ...

Silabs

Associate Staff Analog Design Engineer

Austin, TX · Hybrid

$124K - $231K/yr

Strong motivation to contribute to all aspects of chip design from conceptualization to release to mass production. * Experience with analog IC circuit design in a CAD environment. * Strong knowledge ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA · On-site

$110K - $140K/yr

Description We are looking for qualified Analog design engineers who have a good understanding of ... Perform the whole chip simulation along with the block level, transistor level schematic ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA · On-site

We are looking for qualified Analog design engineers who have a good understanding of analog ... Perform the whole chip simulation along with the block level, transistor level schematic ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA

$110K - $140K/yr

We are looking for qualified Analog design engineers who have a good understanding of analog ... Perform the whole chip simulation along with the block level, transistor level schematic ...

OmniVision Technologies

Analog Design Engineer

Irvine, CA · On-site

$110K - $150K/yr

We are looking forImage Sensor Analog Design Engineer for design and development of next generation ... Perform the whole chip simulation along with the block level, transistor level schematic ...

OMNIVISION

Analog Design Engineer

Irvine, CA

$110K - $150K/yr

We are looking for Image Sensor Analog Design Engineer for design and development of next ... Perform the whole chip simulation along with the block level, transistor level schematic ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA · On-site

Work on whole chip floorplan design and pad frame. Work on analog and mixed signal circuits layout design by Cadence Virtuoso, such as column_array. Collaborate with layout engineer on whole chip ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

Work on whole chip floorplan design and pad frame. Work on analog and mixed signal circuits layout design by Cadence Virtuoso, such as column_array. Collaborate with layout engineer on whole chip ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

Work on whole chip floorplan design and pad frame. Work on analog and mixed signal circuits layout design by Cadence Virtuoso, such as column_array. Collaborate with layout engineer on whole chip ...

OMNIVISION

Analog Design Engineer

Irvine, CA · On-site

$110K - $150K/yr

Description We are looking for Image Sensor Analog Design Engineer for design and development of ... Perform the whole chip simulation along with the block level, transistor level schematic ...

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All JobsAnalog Chip Design Engineer Jobs

Analog Chip Design Engineer information

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How much do analog chip design engineer jobs pay per year?

As of Aug 26, 2026, the average yearly pay for analog chip design engineer in the United States is $186,238.00, according to ZipRecruiter salary data. Most workers in this role earn between $202,000.00 and $202,000.00 per year, depending on experience, location, and employer.

What cities are hiring for Analog Chip Design Engineer jobs?

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Analog Chip Design Engineer jobs near you

Analog and Mixed-Signal IC Design Engineer Intern

Neuralink

South San Francisco, CA

$35/hr

Internship

Re-posted 7 days ago

Job description

Team Description:

The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-machine interface applications. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future. To accelerate our pathway to human ready brain-computer interfaces, you will have the opportunity to partner with our electrical, microfabrication, chip designers, neuro and mechanical engineers.

Job Responsibilities:

We are looking for Analog and Mixed-Signal IC Design Engineer Interns who are interested in architecting and implementing innovative solutions with high energy-efficiency and compact silicon footprint and who thrive with the autonomy to propose creative approaches to problems. 

Neuralink strives to be, as much as possible, a meritocratic environment: we require honest and transparent communication to ensure the best ideas win out, and we believe the best solutions emerge and the best teams are created when you assemble high-performing individuals with different skill sets and perspectives, and allow them to engage in rigorous and thoughtful inquiry. We want to work with exceptional people, and, to the extent that you excel, we want you to take on more responsibility and help all of us succeed. If this speaks to you, come join us.

The Analog and Mixed-Signal IC Design Engineer Intern will be responsible for analog and mixed-signal chip design, from circuit design to layout and verification. 

  • Define and implement innovative and optimal analog and mixed signal circuit architectures and transistor-level circuit solutions to achieve a variety of challenging noise, mismatch, distortion, power consumption, and cost requirements
  • Defines verification plan for a portion of IP or chip and runs complex simulations and analyses (e.g., power, performance, linearity, yield) on designs
  • Designs, programs, and runs complex tests and reviews tests of other team members; ensures bugs and other issues are identified and appropriately analyzed

Key Qualifications:

  • Minimum 1 years of experience in analog/mixed-signal integrated CMOS circuit design for a specific area (e.g., delta-sigma ADC, SAR ADC, DAC, VCO, PLL, DLL, Audio CODEC and Class D audio amplifier, high speed PHY & SERDES) with a successful track record of silicon validation
  • Minimum 3 months experience of application of technical skills outside of the classroom (examples: laboratory, research, extracurricular project teams, open source contributions, volunteering, personal projects or prior internship/work experience)
  • The ideal candidates are people who get excited about building things, are highly analytical, and enjoy tackling new problems regularly

Preferred Qualifications:

  • Skills in scripting and automation for complex simulation scenarios
  • Experience in lab testing of high-precision analog and mixed-signal ICs
  • Functional modeling experience and logic verification with Verilog AMS and SystemVerilog
  • Experience in design and layout with advanced CMOS FinFET technologies
  • Experience with design for high-volume production

Pay Transparency:

Based on California law, the following details are for California individuals only:

California Hourly Rate:

$35/hr USD

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