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Fpga Deep Learning Jobs in Texas (NOW HIRING)

Tenstorrent

Staff Field Application Engineer

Austin, TX · On-site

$100K - $500K/yr

... machine learning, deep learning, natural language processing (NLP),computer vision, PyTorch or TensorFlow. * Experience with embedded systems, FPGA Architecture or AI accelerators. * Good ...

Quaise Energy, Inc

Sr. Electronics Engineer

Houston, TX · On-site

$102K - $126K/yr

Quaise Energy is unlocking Earth's deep heat to deliver clean, reliable, baseload energy at scale ... learning, sourcing, integrating, implementing, performing design-of-experiments, analyzing results ...

Quaise Energy, Inc

Sr. Electronics Engineer

Houston, TX · On-site

$102K - $126K/yr

Quaise Energy is unlocking Earth's deep heat to deliver clean, reliable, baseload energy at scale ... learning, sourcing, integrating, implementing, performing design-of-experiments, analyzing results ...

Hp

GPU Driver & Memory Management Architect

Spring, TX

$147K - $230K/yr

... deep ownership of memory management, enabling efficient shared memory utilization across CPU/GPU ... Array (FPGA) Hardware Architecture Hardware Design MATLAB Mechanical Engineering New Product ...

Quaise Energy, Inc

Sr. Electronics Engineer

Houston, TX · On-site

$102K - $126K/yr

Quaise Energy is unlocking Earth's deep heat to deliver clean, reliable, baseload energy at scale ... learning, sourcing, integrating, implementing, performing design-of-experiments, analyzing results ...

All JobsFpga Deep Learning JobsFpga Deep Learning Jobs in Texas

Fpga Deep Learning information

What is an FPGA Deep Learning engineer?

FPGA Deep Learning engineers are professionals who design, implement, and optimize deep learning models to run efficiently on Field-Programmable Gate Arrays (FPGAs). FPGAs are specialized hardware chips that can be programmed to perform specific computational tasks at high speeds and low power consumption. These engineers bridge the gap between artificial intelligence algorithms and hardware, ensuring that neural networks and AI applications can leverage FPGA advantages such as parallelism and flexibility. Their work is crucial in industries requiring real-time data processing, like autonomous vehicles, robotics, and edge computing.

What are the key skills and qualifications needed to thrive as an FPGA Deep Learning engineer?

To thrive as an FPGA Deep Learning Engineer, you need a solid background in digital design, hardware description languages (such as VHDL or Verilog), deep learning frameworks, and a relevant degree in electrical engineering, computer engineering, or a similar field. Familiarity with FPGA development tools (like Xilinx Vivado or Intel Quartus), hardware accelerators, and experience with deploying neural networks on embedded systems are typically required. Problem-solving ability, attention to detail, and strong collaboration skills are key soft skills that make a candidate stand out. These skills and qualities are essential for efficiently bridging the gap between AI algorithms and hardware implementations, ensuring high-performance, reliable solutions.

How do professionals in FPGA Deep Learning roles typically collaborate with software and data science teams?

FPGA Deep Learning professionals often work closely with software engineers and data scientists to optimize deep learning models for hardware acceleration. This collaboration involves translating neural network architectures from high-level frameworks (like TensorFlow or PyTorch) into efficient hardware implementations, communicating constraints or opportunities for parallelization, and iteratively refining models for performance. Regular meetings and code reviews are common to ensure alignment between hardware and software development. Effective communication and understanding of both domains are essential for successfully deploying deep learning solutions on FPGA platforms.

What is the difference between Fpga Deep Learning vs Machine Learning Engineer?

AspectFpga Deep LearningMachine Learning Engineer
Required CredentialsBachelor's or higher in CS, EE, or related; knowledge of FPGA programming and deep learning frameworksBachelor's or higher in CS, Data Science, or related; expertise in ML algorithms and software development
Work EnvironmentHardware-focused, embedded systems, FPGA development labsSoftware-focused, data centers, cloud platforms, or research labs
Industry UsageEmbedded AI, edge computing, specialized hardware accelerationData analysis, predictive modeling, software solutions across industries

While both roles involve AI and machine learning, Fpga Deep Learning specialists focus on hardware acceleration using FPGAs to optimize deep learning models, whereas Machine Learning Engineers develop and deploy ML algorithms primarily in software environments. The roles often overlap in AI projects but differ in technical focus and work environment.

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Fpga Deep Learning jobs near you

Compiler Engineer - Machine Learning Compiler

Mythic

Austin, TX

Full-time

Re-posted yesterday

Job description

About us

Mythic is building the future of AI computing with breakthrough analog technology that delivers 100 the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications-whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from -40 C to +125 C, making it ideal for industrial, automotive, aerospace, and defense.
We've raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.

About the role

Join us in building the next generation of AI compilers. You'll play a key role in developing the compiler for our novel AI accelerator, working side-by-side with hardware engineers and ML researchers. Your work will shape how deep learning workloads run on cutting-edge dataflow hardware-defining the instruction set, execution model, and developer experience. The result: a compiler that delivers breakthrough performance while remaining seamless and intuitive for ML developers.
Here's what you will do
  • Contribute across the full compiler stack, including operator lowering, graph/IR transformations, optimization passes, and backend code generation
  • Optimize for dataflow architectures, developing pipelined schedules, memory orchestration, and resource-constrained execution strategies
  • Collaborate with hardware architects to influence architectural features, ensuring the compiler and hardware evolve together
  • Develop compilation strategies that unify our analog compute with digital subsystems
  • Build and maintain a compiler that produces high-performance binaries with strong debugging support, clear error messages, and predictable performance models
Here's the background we hope you will have
  • 3+ years of experience building compilers or high-performance systems software, especially those involving complex resource management or optimization.
  • Expert in modern C++ (C++14/17/20) and strong Python.
  • Experience with compiler IRs (SSA-based or graph-based), transformations, and code generation
  • Exposure to specialized accelerators (GPU, NPU, FPGA, or custom ASIC) or parallel architectures
The following would be nice to have, but is not required
  • Experience with machine learning compiler stacks (e.g., ONNX, MLIR, TVM, XLA, IREE, PyTorch), with contributions to MLIR or LLVM projects a plus
  • Experience with optimization methods (LP/MIP, CP, SAT/SMT) using solvers like Gurobi or OR-Tools for scheduling and resource allocation
  • Experience compiling for specialized accelerators (GPU, NPU, FPGA, or custom ASIC) on DNN workloads; GPU/DSP experience is valuable if combined with compiler backend work beyond kernel tuning
  • Familiarity with heterogeneous compilation, especially mixing custom accelerators with CPUs/GPUs/NPUs, and exposure to analog or in-memory compute is a plus
  • Experience collaborating in compiler-hardware co-design (architecture + ISA) for better compiler usability and hardware efficiency
What we offer
  • The opportunity to shape how deep learning and LLM workloads are compiled on novel hardware.
  • A role that spans software and hardware co-design, shaping both the compiler and the accelerator architecture
  • A collaborative, innovative team that values engineering rigor, continuous integration, and user-focused design. We foster an environment of shared learning and technical excellence
  • Competitive compensation, equity, and benefits package
At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.
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