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Flash Memory Test Engineer Jobs (NOW HIRING)

Senior Product Test Engineer****Austin, TX****Meet the Team**At Silicon Labs, we're shaping the ... embedded Flash memory, sensors, ADCs, DACs, LDOs, PLLs, DC-DC converters, and other analog and ...

Senior Product Test Engineer

Austin, TX · On-site

$102K - $190K/yr

Senior Product Test Engineer Austin, TX Meet the Team At Silicon Labs, we're shaping the future of ... embedded Flash memory, sensors, ADCs, DACs, LDOs, PLLs, DC-DC converters, and other analog and ...

With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our ... test, or validation engineering. Additional Information Sandisk is committed to providing equal ...

With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our ... test, or validation engineering. Additional Information Sandisk is committed to providing equal ...

Test Engineer

San Jose, CA · On-site

$150K - $190K/yr

Generate, validate, and deliver ATPG patterns including scan, MBIST, JTAG, and embedded memory read ... Serve as the primary test engineering interface with OSAT partners and test houses * Manage test ...

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Flash Memory Test Engineer information

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How much do flash memory test engineer jobs pay per hour?

As of Sep 11, 2026, the average hourly pay for flash memory test engineer in the United States is $46.58, according to ZipRecruiter salary data. Most workers in this role earn between $34.86 and $59.13 per hour, depending on experience, location, and employer.

What does a flash memory test engineer do?

A Flash Memory Test Engineer is responsible for designing, developing, and executing tests to ensure the reliability, performance, and quality of flash memory devices such as SSDs and embedded memory. They create test plans, develop automated test scripts, analyze test results, and work closely with hardware and firmware engineers to identify and resolve issues. Their work ensures that flash memory products meet industry standards and function correctly under various conditions.

What are the key skills and qualifications needed to thrive as a flash memory test engineer?

To thrive as a Flash Memory Test Engineer, you need a strong background in electrical engineering, semiconductor physics, and hands-on experience with flash memory technology, typically supported by a relevant degree. Familiarity with test automation tools, scripting languages (such as Python or Perl), and hardware testing platforms is essential, along with knowledge of industry standards like JEDEC. Strong analytical thinking, problem-solving abilities, and effective communication skills are crucial for diagnosing issues and collaborating with cross-functional teams. These skills ensure reliable product performance, efficient testing processes, and successful delivery of high-quality flash memory solutions.

What are some common challenges faced by flash memory test engineers, and how can they be addressed?

Flash Memory Test Engineers often encounter challenges such as debugging complex failure modes, keeping up with rapidly evolving memory technologies, and ensuring thorough test coverage under tight project deadlines. To address these, engineers typically collaborate closely with design and product teams to understand specifications, utilize automated testing frameworks to increase efficiency, and participate in regular training or knowledge-sharing sessions. Adopting a proactive approach to learning new testing methodologies and leveraging cross-functional teamwork can help mitigate these challenges and contribute to successful product launches.

What are popular job titles related to Flash Memory Test Engineer jobs?

For Flash Memory Test Engineer jobs, the most frequently searched job titles are:

Infographic showing various Flash Memory Test Engineer job openings in the United States as of June 2026, with employment types broken down into 98% Full Time, 1% Part Time, and 1% Contract. Highlights an 93% Physical, 3% Hybrid, and 4% Remote job distribution, with an average salary of $96,884 per year, or $46.6 per hour.

FPGA Engineering Manager (MTD, Tualatin, OR)

Tualatin, OR • On-site

Teradyne
Manufacturing • 1 - 5K employees

$155K - $248K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted 29 days ago


Job description

We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost-effectively. Together, Teradyne companies deliver manufacturing automation across industries and applications around the world!

We attract, develop, and retain a high-performance workforce, comprised of people with diverse backgrounds and a shared drive for excellence. We strive to foster a positive and inclusive work environment that helps employees, and communities, thrive.

Our Purpose
TERADYNE, where experience meets innovation and driving excellence in every connection. We are fueled by creativity and diversity of thought within our workforce. Our employees are supported to innovate and learn something new every day.
We cultivate a culture of inclusion for all employees that respects their individual strengths, views, and experiences. We believe that our differences enable us to be a better team - one that makes better decisions, drives innovation and delivers better business results.

Opportunity Overview

 

Teradyne's Memory Test Division (MTD) seeks a motivated and technically driven FPGA Manager to support the development of our growing portfolio of cutting-edge memory test solutions.

MTD creates advanced solutions for complex testing applications, driving innovation through creativity and diverse perspectives. Our test instrumentation supports the world's most advanced memory technologies, combining state-of-the-art digital and analog designs, cutting-edge ASIC/FPGA technologies, liquid cooling, and high-performance signal delivery.

We are looking for a hands-on FPGA Engineering Manager to oversee the development of cutting-edge memory test solutions. This role combines technical oversight, project management and direct engineering contributions, ensuring the successful delivery of high-quality, reliable products that support the world's most advanced memory technologies.

Your key responsibilities as FPGA Engineering Manager will be:

  • Plan, prioritize, and manage multiple FPGA development projects, ensuring on-time delivery within budget and scope.
  • Represent the FPGA team on project core teams and at program reviews.
  • Provide support for sustaining issues.
  • Work closely with cross-functional teams, including hardware, software, and firmware engineers, to ensure seamless integration of FPGA designs into larger systems.
  • Recruit, onboard, and retain top engineering talent to build a high-performing team.
  • Set goals and conduct regular performance conversations for a team of 4 to 6 engineers.
  • Contribute to FPGA team process improvement initiatives.
  • Provide hands-on technical guidance to the FPGA engineering team, including reviewing and contributing to FPGA architectures, designs, and specifications.
  • Actively participate in FPGA design and development, including RTL coding, synthesis, timing closure, and lab validation.

All About You
We seek individuals who share our passion. Our commitment to customer success drives us to go the extra mile. If you're ready to join us in this mission, take a closer look at the minimum criteria for the position.

  • B.S. or M.S. in Electrical Engineering or closely related discipline
  • 12+ years of relevant experience in Digital ASIC or FPGA design
  • Minimum of 5 years of experience as an FPGA/ASIC project lead, driving multiple projects through concept development, architectural exploration, design implementation, lab validation, and production release. 
  • Extensive experience coding RTL (verilog preferred). 
  • Extensive experience using digital simulation tools (Cadence preferred). 
  • Extensive experience using static timing analysis tools. 
  • Experience designing with the following: PCIe, DDR3/4/5, AXI, ethernet, SPI, SERDES 
  • Experience with either AMD or Altera FPGAs and development tools (Vivado/Quartus), preferably both. 
  • Experience using digital design quality tools e.g. Lint, CDC. 
  • Experience with bug tracking tools
  • Experience with source control systems and continuous integration. 
  • Familiarity with digital verification tools and methodologies (preferably UVM). 
  • Experience with project scheduling tools
  • Excellent presentation and communication skills. 

Additional Desired Skills:

  • Experience developing hardware for automated test equipment 
  • Experience as a first level manager of an engineering team.   
  • Experience with FPGA Transceiver based designs
  • Experience with DRAM and Flash Memory interfaces
  • Experience with Linux and Windows operating systems
  • Familiarity with ATE instrumentation

Compensation: The base salary range for this role is$155,500-$248,700.This range is a good faith estimate, and the amount of base salary will correspond with experience and skill set. This range can also fluctuate depending on demand and location. 

Incentive Plan: This job is eligible for discretionary bonus(es) based on financial performance.

Benefits: Teradyne offers a variety of robust health and well-being benefit programs, including medical, dental, vision, Flexible Spending Accounts, retirement savings plans, life and disability insurance, paid vacation & holidays, tuition assistance programs, and more. Please click here to see details.

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