... layout rules, and internal procedures. You will work independently and partner closely with Design, Process, and Software Engineers to move IC designs from concept and verification through ...
... layout rules, and internal procedures. You will work independently and partner closely with Design, Process, and Software Engineers to move IC designs from concept and verification through ...
... layout rules, and internal procedures. You will work independently and partner closely with Design, Process, and Software Engineers to move IC designs from concept and verification through ...
... layout rules, and internal procedures. You will work independently and partner closely with Design, Process, and Software Engineers to move IC designs from concept and verification through ...
... layout rules, and internal procedures. You will work independently and partner closely with Design, Process, and Software Engineers to move IC designs from concept and verification through ...
... layout rules, and internal procedures. You will work independently and partner closely with Design, Process, and Software Engineers to move IC designs from concept and verification through ...
... layout rules, and internal procedures. You will work independently and partner closely with Design, Process, and Software Engineers to move IC designs from concept and verification through ...
... layout rules, and internal procedures. You will work independently and partner closely with Design, Process, and Software Engineers to move IC designs from concept and verification through ...
... layout rules, and internal procedures. You will work independently and partner closely with Design, Process, and Software Engineers to move IC designs from concept and verification through ...
... layout rules, and internal procedures. You will work independently and partner closely with Design, Process, and Software Engineers to move IC designs from concept and verification through ...
You will have the opportunity to collaborate closely with chip designers, electrical engineers, algorithms engineers, and software engineers on a small, agile team. As an Analog IC Layout Engineer ...
You will have the opportunity to collaborate closely with chip designers, electrical engineers, algorithms engineers, and software engineers on a small, agile team. As an Analog IC Layout Engineer ...
Analog IC Layout Engineer
Fremont, CA · On-site
$83K - $139K/yr
You will have the opportunity to collaborate closely with chip designers, electrical engineers, algorithms engineers, and software engineers on a small, agile team. As an Analog IC Layout Engineer ...
Analog IC Layout Engineer
Fremont, CA · On-site
$83K - $139K/yr
You will have the opportunity to collaborate closely with chip designers, electrical engineers, algorithms engineers, and software engineers on a small, agile team. As an Analog IC Layout Engineer ...
Integrated Circuit Designer, Layout
Wilmington, MA · On-site
$92.88K - $127.71K/yr
Designer, Layout About the Role As a Designer, Layout, you are a developing professional with ... Proficiency in IC layout, CMOS technology, timing analysis, and EDA tools * Process Understanding
Integrated Circuit Designer, Layout
Wilmington, MA · On-site
$92.88K - $127.71K/yr
Designer, Layout About the Role As a Designer, Layout, you are a developing professional with ... Proficiency in IC layout, CMOS technology, timing analysis, and EDA tools * Process Understanding
Integrated Circuit Designer, Layout
Durham, NC · On-site
$92.88K - $127.71K/yr
Designer, Layout About the Role As a Designer, Layout, you are a developing professional with ... Proficiency in IC layout, CMOS technology, timing analysis, and EDA tools * Process Understanding
Integrated Circuit Designer, Layout
Durham, NC · On-site
$92.88K - $127.71K/yr
Designer, Layout About the Role As a Designer, Layout, you are a developing professional with ... Proficiency in IC layout, CMOS technology, timing analysis, and EDA tools * Process Understanding
Integrated Circuit Designer, Layout
$92.88K - $127.71K/yr
Designer, Layout About the Role As a Designer, Layout, you are a developing professional with ... Proficiency in IC layout, CMOS technology, timing analysis, and EDA tools * Process Understanding
Integrated Circuit Designer, Layout
$92.88K - $127.71K/yr
Designer, Layout About the Role As a Designer, Layout, you are a developing professional with ... Proficiency in IC layout, CMOS technology, timing analysis, and EDA tools * Process Understanding
Integrated Circuit Designer, Layout
Wilmington, MA · On-site
$92.88K - $127.71K/yr
Designer, Layout About the Role As a Designer, Layout, you are a developing professional with ... Proficiency in IC layout, CMOS technology, timing analysis, and EDA tools * Process Understanding
Integrated Circuit Designer, Layout
Wilmington, MA · On-site
$92.88K - $127.71K/yr
Designer, Layout About the Role As a Designer, Layout, you are a developing professional with ... Proficiency in IC layout, CMOS technology, timing analysis, and EDA tools * Process Understanding
QPU Design Engineer
$126.80K - $240.60K/yr
... designs for ion trapping chips into production. You will play an important part in shaping the ... At least 3 years of industry experience leading complex chip design and in IC layout. * A degree in ...
QPU Design Engineer
$126.80K - $240.60K/yr
... designs for ion trapping chips into production. You will play an important part in shaping the ... At least 3 years of industry experience leading complex chip design and in IC layout. * A degree in ...
QPU Design Engineer
Bothell, WA · On-site
$126.80K - $240.60K/yr
... designs for ion trapping chips into production. You will play an important part in shaping the ... At least 3 years of industry experience leading complex chip design and in IC layout. * A degree in ...
Quick apply
QPU Design Engineer
Bothell, WA · On-site
$126.80K - $240.60K/yr
... designs for ion trapping chips into production. You will play an important part in shaping the ... At least 3 years of industry experience leading complex chip design and in IC layout. * A degree in ...
QPU Design Engineer
Bothell, WA · On-site
$126.80K - $240.60K/yr
... designs for ion trapping chips into production. You will play an important part in shaping the ... At least 3 years of industry experience leading complex chip design and in IC layout. * A degree in ...
QPU Design Engineer
Bothell, WA · On-site
$126.80K - $240.60K/yr
... designs for ion trapping chips into production. You will play an important part in shaping the ... At least 3 years of industry experience leading complex chip design and in IC layout. * A degree in ...
Your day-to-day work will include designing and drawing schematics, simulating for functionality and parametric performance, and assisting in IC layout and post-layout extracted simulations. Beyond ...
Your day-to-day work will include designing and drawing schematics, simulating for functionality and parametric performance, and assisting in IC layout and post-layout extracted simulations. Beyond ...
Career Accelerator Program - Analog IC Design Engineer AI/ML
Dallas, TX · On-site
$183.90K/yr
Your day-to-day work will include designing and drawing schematics, simulating for functionality and parametric performance, and assisting in IC layout and post-layout extracted simulations. Beyond ...
Career Accelerator Program - Analog IC Design Engineer AI/ML
Dallas, TX · On-site
$183.90K/yr
Your day-to-day work will include designing and drawing schematics, simulating for functionality and parametric performance, and assisting in IC layout and post-layout extracted simulations. Beyond ...
Analog IC Design Engineer
Cupertino, CA · On-site
Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... as it applies to analog IC designsProven working experience in using spectrum analyzers ...
Analog IC Design Engineer
Cupertino, CA · On-site
Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... as it applies to analog IC designsProven working experience in using spectrum analyzers ...
Analog IC Design Engineer
Cupertino, CA · On-site
Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... as it applies to analog IC designsProven working experience in using spectrum analyzers ...
Analog IC Design Engineer
Cupertino, CA · On-site
Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... as it applies to analog IC designsProven working experience in using spectrum analyzers ...
This entry level team member position will be exposed to a variety of retail tasks related to product, customer service and merchandising. Join a community. Build a career. We are searching for a new ...
This entry level team member position will be exposed to a variety of retail tasks related to product, customer service and merchandising. Join a community. Build a career. We are searching for a new ...
Lead Analog IC Designer
San Jose, CA · On-site
$114.80K - $213.20K/yr
The lead Analog IC Designer is responsible for the design and development of analog/mixed signal IC ... Position requires proficiency in using CAD tools for circuit simulation, layout, and physical ...
Lead Analog IC Designer
San Jose, CA · On-site
$114.80K - $213.20K/yr
The lead Analog IC Designer is responsible for the design and development of analog/mixed signal IC ... Position requires proficiency in using CAD tools for circuit simulation, layout, and physical ...
Entry Level Ic Layout Designer information
See salary details
$16.79 is the 25th percentile. Wages below this are outliers.
$10.10 - $18.36
31% of jobs
$18.36 - $26.62
16% of jobs
The median wage is $29.10 / hr.
$26.62 - $34.88
11% of jobs
$34.88 - $43.14
15% of jobs
$48.30 is the 75th percentile. Wages above this are outliers.
$43.14 - $51.40
4% of jobs
$51.40 - $59.66
6% of jobs
$59.66 - $67.92
5% of jobs
$67.92 - $76.18
3% of jobs
$76.18 - $84.44
2% of jobs
$84.44 - $92.70
3% of jobs
$92.70 - $100.96
3% of jobs
$10
$41
$100
How much do entry level ic layout designer jobs pay per hour?
As of May 31, 2026, the average hourly pay for entry level ic layout designer in the United States is $41.30, according to ZipRecruiter salary data. Most workers in this role earn between $17.55 and $58.41 per hour, depending on experience, location, and employer.
What are the key skills and qualifications needed to thrive as an Entry Level IC Layout Designer, and why are they important?
To thrive as an Entry Level IC Layout Designer, you need a solid understanding of semiconductor fundamentals, circuit design basics, and a relevant degree in electrical engineering or a related field. Proficiency in CAD tools such as Cadence Virtuoso, Mentor Graphics, or Synopsys, along with familiarity with design rule checking (DRC) and layout versus schematic (LVS) verification, is typically required. Strong attention to detail, effective communication, and the ability to collaborate within engineering teams are standout soft skills. These skills ensure accurate and efficient IC layouts, compliance with manufacturing constraints, and smooth teamwork throughout the design process.
What are some common challenges faced by entry-level IC layout designers, and how can they overcome them?
Entry-level IC layout designers often encounter challenges such as understanding complex design rules, adapting to new EDA (Electronic Design Automation) tools, and ensuring layouts meet both electrical and manufacturing constraints. Collaborating closely with senior designers and verification engineers is essential to resolve issues quickly and learn best practices. It’s helpful to proactively seek feedback, participate in team reviews, and continuously practice with layout tools to build confidence and expertise in this highly detail-oriented role.
What does an Entry Level IC Layout Designer do?
An Entry Level IC Layout Designer is responsible for creating the physical layout of integrated circuits (ICs) based on circuit schematics and design rules. They use specialized software tools to position transistors, wires, and other components on silicon chips, ensuring that the design meets performance, area, and manufacturing requirements. This role often involves collaborating with circuit designers and verification engineers to optimize layouts for efficiency and manufacturability. Entry level designers typically work under the supervision of more experienced engineers and gain hands-on experience with industry-standard EDA tools. Over time, they develop a deeper understanding of IC design principles and fabrication processes.
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Qorvo rating
8.2
Based on 20 frontline employees who took The Breakroom Quiz
Job description
Qorvo (Nasdaq: QRVO) supplies innovative semiconductor solutions that make a better world possible. We combine product and technology leadership, systems-level expertise and global manufacturing scale to quickly solve our customers' most complex technical challenges. Qorvo serves multiple high-growth segments of large global markets, including consumer electronics, smart home/IoT, automotive, EVs, battery-powered appliances, network infrastructure, healthcare and aerospace/defense. Visit www.qorvo.com to learn how our innovative team is helping connect, protect and power our planet.
In this role, you will be supporting products within the High-Performance Analog division. You will create and maintain IC CAD design files using industry-standard tools, ensuring compliance with design guides, layout rules, and internal procedures. You will work independently and partner closely with Design, Process, and Software Engineers to move IC designs from concept and verification through documentation release, manufacturing, and test.
This is onsite role that can be based in one of the following offices: Apopka FL, Greensboro NC, Hillsboro OR, or Richardson TX.
Responsibilities:
- Collaborate with Design, Process, and Software Engineers to develop designs from concept through schematic, layout, and manufacturing release.
- Perform design-rule checks and verification.
- Create and update fabrication and product drawings using tools such as ADS, AWR, Cadence, and AutoCAD.
- Generate ECOs (Engineering Change Orders) to release completed drawings and bills of materials (BOMs).
- Update existing documentation based on input from Engineering and Manufacturing.
- Review BOMs and drawings as they transfer from Engineering to Manufacturing to ensure accuracy and complete documentation handoff.
Required Qualifications:
- Associate degree in Electronics or equivalent relevant experience.
- 1+ working in the semiconductor industry
- Ability to manage timelines and expectations, work efficiently, and produce high-quality deliverables.
- Proficiency with Microsoft Office
Preferred Qualifications:
- 1+ years of CAD design experience.
- Proficiency with ECAD tools such as ADS, Altium, Cadence, AWR, and AutoCAD.
- Strong written and verbal communication skills.
This position is not eligible for visa sponsorship by the Company.
This position requires work on US Government contracts. Applicants must be a US Person (US citizen, permanent resident, asylee or refugee).
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MAKE A DIFFERENCE AT QORVO
We are Qorvo. We do more than create innovative RF and Power solutions for the mobile, defense and infrastructure markets - we are a place to innovate and shape the future of wireless communications. It starts with our employees. As a unified global team, we bring a commitment to excellence, growth and a passion for creating what's next. Explore the possibilities with us.
We are an Equal Employment Opportunity (EEO) employer and welcome all qualified applicants. Applicants will receive fair and impartial consideration without regard to any characteristics protected by applicable law, including race, color, religion, sex (as defined by law), national origin, age, military or veteran status, genetic information, or disability.
About Qorvo
Sourced by ZipRecruiter
Industry
Manufacturing and manufacturing
Company size
5,001 - 10,000 Employees
Headquarters location
Greensboro, NC, US
Year founded
1957