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Entry Level Asic Design Engineer Jobs in Seattle, WA

TheElectrical Engineer II works under general supervision and applies established procedures to ... ASIC Design * Magnetics Design * Experience with various switching power supply topologies

CAD Designer 1

Seattle, WA

$30.75 - $42.50/hr

From engineering and design to manufacturing, supply, and field service, we deliver top-quality ... This entry-level role is ideal for individuals eager to grow in drafting, engineering, or ...

Overview At Ardurra , we don't just design projects--we design futures. As an Entry-Level Civil Engineer , you'll work on meaningful projects that improve lives, from sustainable water systems to ...

Showing results 21-40

Entry Level Asic Design Engineer information

See Seattle, WA salary details

$107K

$171K

$230K

How much do entry level asic design engineer jobs pay per year?

As of Aug 11, 2026, the average yearly pay for entry level asic design engineer in Seattle, WA is $171,023.00, according to ZipRecruiter salary data. Most workers in this role earn between $149,700.00 and $205,000.00 per year, depending on experience, location, and employer.

What is an entry level ASIC design engineer?

An Entry Level ASIC Design Engineer is responsible for assisting in the design, development, and testing of Application-Specific Integrated Circuits (ASICs). They work with senior engineers to define specifications, write hardware descriptions using languages like Verilog or VHDL, and perform simulations to validate designs. They may also collaborate with verification teams, support synthesis and timing analysis, and help troubleshoot design issues. This role requires a strong foundation in digital logic design, semiconductor fundamentals, and hardware design methodologies.

What are the typical daily responsibilities for an entry level ASIC design engineer?

As an Entry Level ASIC Design Engineer, your daily tasks often include writing and debugging code in hardware description languages, running simulations to verify functionality, and collaborating with senior engineers to implement and optimize chip designs. You may also assist with testbench development, participate in design reviews, and document your progress for project tracking. Expect to work closely with a multidisciplinary team—including verification, layout, and software engineers—to ensure the final product meets performance and reliability standards. This collaborative, fast-paced environment provides valuable hands-on experience and growth opportunities for engineers early in their careers.

What are the key skills and qualifications needed to thrive in the entry level ASIC design engineer position, and why are they important?

To thrive as an Entry Level ASIC Design Engineer, you need a solid understanding of digital logic design, hardware description languages (such as Verilog or VHDL), and a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools like Synopsys or Cadence and experience with simulation and verification environments are commonly expected. Strong problem-solving skills, effective communication, and the ability to work collaboratively make candidates stand out. These competencies enable precise design, successful project collaboration, and adaptation to the fast-paced, detail-oriented nature of ASIC development.

What are the most commonly searched types of Asic Design Engineer jobs in Seattle, WA? The most popular types of Asic Design Engineer jobs in Seattle, WA are:
What job categories do people searching Entry Level Asic Design Engineer jobs in Seattle, WA look for? The top searched job categories for Entry Level Asic Design Engineer jobs in Seattle, WA are:
What cities near Seattle, WA are hiring for Entry Level Asic Design Engineer jobs? Cities near Seattle, WA with the most Entry Level Asic Design Engineer job openings:
Infographic showing various Entry Level Asic Design Engineer job openings in Seattle, WA as of August 2026, with employment types broken down into 58% Full Time, and 42% Contract. Highlights an 100% In-person job distribution, with an average salary of $171,023 per year, or $82.2 per hour.

Site Reliability Engineer -- HPC & Automation (Silicon Engineering)

InvestedintheMission

Redmond, WA • On-site

$125 - $175/hr

Other

Medical, Dental, Vision, Life, Retirement, PTO

Posted yesterday

New


Job description

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.

SITE RELIABILITY ENGINEER — HPC & AUTOMATION (SILICON ENGINEERING)

At SpaceX we’re leveraging our experience in building rockets and spacecraft to deploy Starlink, the world’s most advanced broadband internet system. Starlink is the world’s largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system – thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We’ve only begun to scratch the surface of Starlink’s potential global impact and are looking for best-in-class engineers to help maximize Starlink’s utility for communities and businesses around the globe.

We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). As a Site Reliability Engineer on the Silicon Engineering team you will get the opportunity to design, operate, scale, and automate the high performance computing infrastructure we use to develop the chips powering the world's largest satellite constellation and a global internet service. This position will have a meaningful impact on Starlink silicon by enabling faster design-iterations, simulations, and regression turnaround times that gate how fast our chip teams can ship.

RESPONSIBILITIES:
  • Deploy, upgrade, operate, maintain, and scale our suite of clusters and services
  • Collaborate with engineers to develop automated, full turnkey solutions for silicon simulation workflows to speed up project timelines
  • Manage our underlying infrastructure as code and use modern observability tools to provide a complete picture of cluster and infrastructure health
  • Operate the continuous integration pipeline, build and release systems, and version control across the environment
  • Identify and eliminate performance bottlenecks using measurement and creative engineering
BASIC QUALIFICATIONS:
  • Bachelor’s degree in computer science, information systems, or an engineering discipline; OR 2+ years of professional experience in system administration, high performance computing, or site reliability engineering
  • 1+ years of development experience with Bash, Python, and/or other programming languages
  • 1+ years of experience with Linux operating systems
PREFERRED SKILLS AND EXPERIENCE:
  • Familiarity with containerization technologies (i.e. Docker, Kubernetes)
  • Knowledge in computer system concepts (computer architecture, computer organization, operating systems and concurrency)
  • Experience with databases and data modeling (e.g., MySQL, PostgreSQL, SQLite)
  • Networking knowledge of TCP/IP
  • Experience with high performance computing and workload managers (e.g., Slurm, LSF)
  • Experience with Terraform, Ansible, Puppet, or similar automation frameworks
  • Experience building monitoring and alerting as code (e.g., Grafana, Prometheus, custom exporters)
  • Experience with CI/CD automation at scale (e.g., Jenkins, Bamboo, build systems)
  • Experience with infrastructure as code (IaC) tools for managing fleets of servers
  • Experience with using & building REST API clients/servers
  • Experience with enterprise/networked storage automation (e.g., NetApp ONTAP REST API/CLI, NFS)
  • Experience with ASIC design flows and tools (e.g., Cadence, Synopsys, Ansys, Keysight, Siemens)
  • Strong desire to find performance bottlenecks and performance improvement techniques
  • Excellent communication skills with the ability to communicate with customers, peers, management, etc. in both formal and informal situations
  • Ability to quickly learn new tools and frameworks
  • Interest in or experience with AI/LLM-assisted tooling (e.g., Grok, Claude Code)
ADDITIONAL REQUIREMENTS:
  • Ability to work extended hours and weekends as needed to meet critical milestones
COMPENSATION AND BENEFITS:

Pay Range:
Level 1: $125,000.00 - $150,000.00
Level 2: $145,000.00 - $175,000.00

Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.

  • Base salary is just one part of your total rewards package at SpaceX.
  • You may also be eligible for long-term incentives, in the form of company stock or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan.
  • You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short and long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks.
  • You may also accrue 3 weeks of paid vacation and will be eligible for 10 or more paid holidays per year.
  • Employees in Washington State accrue paid sick time in compliance with state and federal law.
  • Company shuttles are offered to employees for roundtrip travel from select Seattle locations to the SpaceX Redmond office Monday to Friday.
ITAR REQUIREMENTS:
  • To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.

SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

Applicants wishing to view a copy of SpaceX’s Affi… or applicants requiring reasonable accommodation to the application/interview process should reach out to EEOCompliance@spacex.com.

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