Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verifi.
Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verifi.
ASIC Engineer, Annapurna Labs
Austin, TX · On-site
$164K/yr
We're looking for an ASIC Design Engineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs. Key job responsibilities ...
ASIC Engineer, Annapurna Labs
Austin, TX · On-site
$164K/yr
We're looking for an ASIC Design Engineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs. Key job responsibilities ...
Meta is hiring an ASIC Design Verification Engineer within the Infrastructure Silicon organization. We are looking for individuals with experience in De.
Meta is hiring an ASIC Design Verification Engineer within the Infrastructure Silicon organization. We are looking for individuals with experience in De.
ASIC Engineer, Annapurna Labs
Austin, TX · On-site
$164K/yr
We're looking for an ASIC Design Engineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs. Key job responsibilities ...
ASIC Engineer, Annapurna Labs
Austin, TX · On-site
$164K/yr
We're looking for an ASIC Design Engineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs. Key job responsibilities ...
Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verifi.
Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verifi.
Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to drive verification strategy and execution for custom silicon
Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to drive verification strategy and execution for custom silicon
ASIC Engineer, Design Verification
Austin, TX · On-site +1
$114K/yr
Meta is hiring an ASIC Design Verification Engineer within the Infrastructure Silicon organization. We are looking for individuals with experience in Design Verification to build IP and System on ...
ASIC Engineer, Design Verification
Austin, TX · On-site +1
$114K/yr
Meta is hiring an ASIC Design Verification Engineer within the Infrastructure Silicon organization. We are looking for individuals with experience in Design Verification to build IP and System on ...
Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to lead verification strategy and execution for custom silicon p.
Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to lead verification strategy and execution for custom silicon p.
We are now looking for an ASIC Design Efficiency Engineer! NVIDIA is seeking extraordinary methodology engineers to design hardware accelerators and processors on our next-generation mobile, embedded ...
We are now looking for an ASIC Design Efficiency Engineer! NVIDIA is seeking extraordinary methodology engineers to design hardware accelerators and processors on our next-generation mobile, embedded ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an ... Works closely with design teams to enable the DFT features in ASICs, validate on ATE, integrate in ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an ... Works closely with design teams to enable the DFT features in ASICs, validate on ATE, integrate in ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an ... Works closely with design teams to enable the DFT features in ASICs, validate on ATE, integrate in ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an ... Works closely with design teams to enable the DFT features in ASICs, validate on ATE, integrate in ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an ... Works closely with design teams to enable the DFT features in ASICs, validate on ATE, integrate in ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an ... Works closely with design teams to enable the DFT features in ASICs, validate on ATE, integrate in ...
ASIC Engineer, Annapurna Labs
Austin, TX · On-site
$164K/yr
We're looking for an ASIC Design Engineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs. Key job responsibilities ...
ASIC Engineer, Annapurna Labs
Austin, TX · On-site
$164K/yr
We're looking for an ASIC Design Engineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs. Key job responsibilities ...
ASIC Implementation Engineer - Static Verification Responsibilities: * Perform Flat and ... Work closely with the Design Engineers, DV Engineers, Emulation Engineers in supporting them with ...
ASIC Implementation Engineer - Static Verification Responsibilities: * Perform Flat and ... Work closely with the Design Engineers, DV Engineers, Emulation Engineers in supporting them with ...
ASIC Design Engineer - Fabric/Interconnect
$150K - $277K/yr
In order to achieve this, Apple's best-in-class chip is driven by top notch design engineers who implement various blocks of the chip and deliver high quality components to SoC. This is a high ...
ASIC Design Engineer - Fabric/Interconnect
$150K - $277K/yr
In order to achieve this, Apple's best-in-class chip is driven by top notch design engineers who implement various blocks of the chip and deliver high quality components to SoC. This is a high ...
In order to achieve this, Apple's best-in-class chip is driven by top notch design engineers who implement various blocks of the chip and deliver high quality components to SoC. This is a high ...
In order to achieve this, Apple's best-in-class chip is driven by top notch design engineers who implement various blocks of the chip and deliver high quality components to SoC. This is a high ...
ASIC Design Engineer - Fabric/Interconnect
$150K - $277K/yr
In order to achieve this, Apple's best-in-class chip is driven by top notch design engineers who implement various blocks of the chip and deliver high quality components to SoC. This is a high ...
ASIC Design Engineer - Fabric/Interconnect
$150K - $277K/yr
In order to achieve this, Apple's best-in-class chip is driven by top notch design engineers who implement various blocks of the chip and deliver high quality components to SoC. This is a high ...
As an ASIC Engineer specializing in architecture, performance and modeling, you will define and ... Collaborate with architecture, RTL design, and physical design teams to translate performance ...
As an ASIC Engineer specializing in architecture, performance and modeling, you will define and ... Collaborate with architecture, RTL design, and physical design teams to translate performance ...
Meta is seeking highly skilled Design Engineers to join our team. In this role, you will contribute to the development of advanced technology solutions,
Meta is seeking highly skilled Design Engineers to join our team. In this role, you will contribute to the development of advanced technology solutions,
Physical Design Engineer- senior
Austin, TX · On-site
$115K - $173K/yr
As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance ...
Physical Design Engineer- senior
Austin, TX · On-site
$115K - $173K/yr
As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance ...
Entry Level Asic Design Engineer information
See Texas salary details
$87.6K - $96.7K
16% of jobs
$96.7K - $105.9K
3% of jobs
$105.9K - $115K
4% of jobs
$117.7K is the 25th percentile. Wages below this are outliers.
$115K - $124.2K
6% of jobs
The median wage is $129.9K / yr.
$124.2K - $133.3K
33% of jobs
$133.3K - $142.5K
3% of jobs
$142.5K - $151.6K
2% of jobs
$157.6K is the 75th percentile. Wages above this are outliers.
$151.6K - $160.8K
12% of jobs
$160.8K - $169.9K
5% of jobs
$169.9K - $179K
4% of jobs
$179K - $188.2K
12% of jobs
$87.6K
$139.9K
$188.2K
How much do entry level asic design engineer jobs pay per year?
What is an entry level ASIC design engineer?
An Entry Level ASIC Design Engineer is responsible for assisting in the design, development, and testing of Application-Specific Integrated Circuits (ASICs). They work with senior engineers to define specifications, write hardware descriptions using languages like Verilog or VHDL, and perform simulations to validate designs. They may also collaborate with verification teams, support synthesis and timing analysis, and help troubleshoot design issues. This role requires a strong foundation in digital logic design, semiconductor fundamentals, and hardware design methodologies.
What are the typical daily responsibilities for an entry level ASIC design engineer?
As an Entry Level ASIC Design Engineer, your daily tasks often include writing and debugging code in hardware description languages, running simulations to verify functionality, and collaborating with senior engineers to implement and optimize chip designs. You may also assist with testbench development, participate in design reviews, and document your progress for project tracking. Expect to work closely with a multidisciplinary team—including verification, layout, and software engineers—to ensure the final product meets performance and reliability standards. This collaborative, fast-paced environment provides valuable hands-on experience and growth opportunities for engineers early in their careers.
What are the key skills and qualifications needed to thrive in the entry level ASIC design engineer position, and why are they important?
To thrive as an Entry Level ASIC Design Engineer, you need a solid understanding of digital logic design, hardware description languages (such as Verilog or VHDL), and a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools like Synopsys or Cadence and experience with simulation and verification environments are commonly expected. Strong problem-solving skills, effective communication, and the ability to work collaboratively make candidates stand out. These competencies enable precise design, successful project collaboration, and adaptation to the fast-paced, detail-oriented nature of ASIC development.

Meta rating
7.8
Based on 45 frontline employees who took The Breakroom Quiz
135th of 241 rated software companies
Job description
Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verifi...
About Meta
Sourced by ZipRecruiter
Industry
Internet and it, media and telecom and software development
Company size
10,000+ Employees
Headquarters location
Menlo Park, CA, US