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Drc Testing Jobs in California (NOW HIRING)

OMNIVISION

Analog Design Engineer

Santa Clara, CA

$156K - $160K/yr

Perform design verification such as DRC, LVS, PERC check by using Siemens Caliber. Collaborate with ... Testing and troubleshooting power IC. * Using lab equipment testing specific IC. * Photonic device ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA · On-site

Perform design verification such as DRC, LVS, PERC check by using Siemens Caliber. Collaborate with ... Testing and troubleshooting power IC. * Using lab equipment testing specific IC. * Photonic device ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

Perform design verification such as DRC, LVS, PERC check by using Siemens Caliber. Collaborate with ... Testing and troubleshooting power IC. * Using lab equipment testing specific IC. * Photonic device ...

Blue Origin

Sr Foundry Engineer

Bodega Bay, CA · On-site

$197K - $276K/yr

Support production engineering wafer acceptance testing (WAT) and reliability qualification ... signoff (DRC, LVS, antenna, DFM), GDS streaming, and foundry submission protocols. * Strong ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

... DRC), Layout vs. Schematic (LVS), and Physical Electrical Rule Check (PERC) using Calibre. • ... Build scalable toolchains to support multi-corner, multi-mode simulations and regression testing ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

... DRC), Layout vs. Schematic (LVS), and Physical Electrical Rule Check (PERC) using Calibre. • ... Build scalable toolchains to support multi-corner, multi-mode simulations and regression testing ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA · On-site

... DRC), Layout vs. Schematic (LVS), and Physical Electrical Rule Check (PERC) using Calibre. • ... Build scalable toolchains to support multi-corner, multi-mode simulations and regression testing ...

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How much do drc testing jobs pay per hour?

As of Jun 16, 2026, the average hourly pay for drc testing in California is $20.10, according to ZipRecruiter salary data. Most workers in this role earn between $17.07 and $21.59 per hour, depending on experience, location, and employer.

What is a DRC Testing job?

A DRC (Design Rule Checking) Testing job involves verifying semiconductor chip layouts to ensure they meet manufacturing and design requirements. Engineers use specialized EDA (Electronic Design Automation) tools to detect and fix rule violations related to spacing, width, and other constraints. This role is essential in the chip design flow to prevent fabrication errors and optimize performance. DRC testers work closely with design and verification teams to improve layout quality and ensure compliance with industry standards.

How much do DRC test scorers make?

Drc testing test scorers typically earn between $10 and $20 per hour, depending on experience, location, and the specific testing environment. Compensation may also include benefits such as flexible schedules and training opportunities.

Is DRC a good company to work for?

Drc Testing as a job role involves conducting diagnostic tests, often requiring attention to detail and familiarity with testing procedures. The work environment can vary, and employee experiences depend on the specific employer and location. Researching company reviews and job requirements can provide more insight into job satisfaction and workplace conditions.

What jobs pay $10,000 a month without a degree?

In the field of DRC testing or related technical roles, high-paying positions such as specialized laboratory technicians, quality assurance managers, or project managers can reach or exceed $10,000 per month with experience and relevant certifications. These roles often require technical skills, industry knowledge, and sometimes on-the-job training rather than a formal degree.

How much does DRC pay scorers?

Drc Testing scorer positions typically pay around minimum wage to $15 per hour, depending on location and experience. Compensation may vary based on the specific testing program and whether the role is part-time or temporary. Scorers often need attention to detail and familiarity with testing procedures.

What are the key skills and qualifications needed to thrive in the Drc Testing position, and why are they important?

To thrive in DRC Testing, candidates need a solid understanding of software testing methodologies, quality assurance processes, and a relevant background in computer science or engineering. Familiarity with testing tools such as Selenium, JIRA, or TestRail, and relevant certifications like ISTQB are often expected. Attention to detail, analytical thinking, and strong communication skills help individuals excel in diagnosing and reporting issues. These skills ensure effective identification and resolution of defects, contributing to the delivery of reliable, high-quality digital solutions.

What are the typical daily responsibilities of someone working in DRC Testing?

Professionals in DRC Testing are responsible for designing and executing test cases, documenting results, and reporting defects using issue tracking systems. Their work often involves collaborating closely with development teams to troubleshoot and resolve problems, as well as verifying that fixes meet project requirements. Regular duties may also include maintaining test documentation, participating in team meetings, and contributing to continuous process improvement. By ensuring comprehensive testing and clear communication, they play a critical role in the successful deployment of software products.

What are the most commonly searched types of Drc Testing jobs in California? The most popular types of Drc Testing jobs in California are:
What are popular job titles related to Drc Testing jobs in California? For Drc Testing jobs in California, the most frequently searched job titles are:
What job categories do people searching Drc Testing jobs in California look for? The top searched job categories for Drc Testing jobs in California are:
Drc Testing jobs near you
Staff DFT Engineer

Staff DFT Engineer

Marvell Technology, Inc.

Santa Clara, CA • On-site

Full-time

Life, Retirement

Posted 21 days ago

Job description

About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
As Generative AI continues to advance, the performance drivers for data center infrastructure are shifting from systems-on-chip (SOCs) to systems of chips. In the era of Accelerated Computing, data center bottlenecks are no longer limited to compute performance, but rather the system's interconnect bandwidth, memory bandwidth, and memory capacity.
What You Can Expect
We are seeking a Staff DFT Engineer with 5+ years of hands-on implementation experience across MBIST, BISR, Boundary Scan, and IJTAG. This is a highly execution-driven role requiring end-to-end ownership of DFT insertion, verification, DRC closure, and test coverage closure from RTL/netlist through post-silicon debug.
In this role, you will partner closely with RTL, Physical Design, and ATE teams to deliver clean DFT signoff and robust test coverage for complex SoC designs.
  • Perform hands-on DFT implementation, including:
    • MBIST and BISR insertion and integration
    • Boundary Scan (IEEE 1149.x) insertion
    • IJTAG (IEEE 1687) insertion and connectivity
  • Execute DFT verification, debug, and DFT DRC closure using Siemens Tessent
  • Identify, debug, and resolve DFT rule violations at both block and top levels
  • Run, analyze, and debug SpyGlass DFT/RTL checks, working with design teams to close violations
  • Generate, simulate, and debug MBIST and logic ATPG patterns
  • Analyze test results and drive test coverage improvement and closure
  • Develop and validate DFT timing constraints for scan, BIST, and test modes
  • Create and maintain TCL scripts to automate DFT insertion, verification, and analysis flows
  • Support hierarchical DFT implementation and resolve integration issues
  • Collaborate with RTL and Physical Design teams to address DFT-related design issues
  • Support pre-silicon DFT signoff and assist with post-silicon pattern bring-up and debug
  • Assist with ATE pattern conversion and debug as needed

What We're Looking For
  • Bachelor's degree in Computer Science, Electrical Engineering or related fields and 3-5 years
    of related professional experience OR Master's degree and/or PhD in Computer Science, Electrical Engineering or related fields with 2-3 years of experience.
  • 5+ years of hands-on DFT implementation experience
  • Strong proficiency with Siemens Tessent, including:
    • MBIST / BISR insertion and verification
    • Boundary Scan (IEEE 1149.x)
    • IJTAG (IEEE 1687)
    • ATPG pattern generation and coverage analysis
  • Proven ability to resolve DFT DRCs, connectivity issues, and testability problems
  • Strong TCL scripting skills for DFT automation and flow execution
  • Experience developing and validating scan and test-mode timing constraints
  • End-to-end DFT lifecycle experience, from RTL/netlist through silicon debug
  • Strong debugging skills, attention to detail, and sense of ownership
  • Excellent verbal and written communication skills

PREFERRED QUALIFICATIONS
  • Experience driving MBIST coverage improvement and repair efficiency optimization
  • Post-silicon experience, including:
    • Pattern bring-up and debug
    • Tester pattern conversion
    • Silicon characterization
  • Exposure to mixed-signal or SERDES DFT, such as IOBIST or loopback testing

Expected Base Pay Range (USD)
113,920 - 170,600, $ per annum
The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life's most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
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