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Drc Testing Jobs in California (NOW HIRING)

OMNIVISION

Analog Design Engineer

Santa Clara, CA · On-site

Perform design verification such as DRC, LVS, PERC check by using Siemens Caliber. Collaborate with ... Testing and troubleshooting power IC. * Using lab equipment testing specific IC. * Photonic device ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

Perform design verification such as DRC, LVS, PERC check by using Siemens Caliber. Collaborate with ... Testing and troubleshooting power IC. * Using lab equipment testing specific IC. * Photonic device ...

Cspeed

PCB Design & Validation Engineer

Palo Alto, CA · On-site

Manage DRC, fab outputs (Gerbers, assembly drawings), vendor coordination; maintain schematic ... Execute host interop testing, standards compliance (IEEE 802.3, CMIS, OIF), and reliability ...

Google Inc.

Silicon Physical Design Engineer

Sunnyvale, CA · On-site

$116 - $166/hr

Experience with Synopsys/Cadence PnR tools and backend flows (e.g., LEC, PI/SI, DRC/LVS, etc ... Identify test requirements, select appropriate tools, methods, and approach, and carry out testing ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

Perform design verification such as DRC, LVS, PERC check by using Siemens Caliber. Collaborate with ... Testing and troubleshooting power IC. * Using lab equipment testing specific IC. * Photonic device ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA

... DRC), Layout vs. Schematic (LVS), and Physical Electrical Rule Check (PERC) using Calibre ... Build scalable toolchains to support multi-corner, multi-mode simulations and regression testing ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA

$156K - $160K/yr

... DRC), Layout vs. Schematic (LVS), and Physical Electrical Rule Check (PERC) using Calibre. • ... Build scalable toolchains to support multi-corner, multi-mode simulations and regression testing ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

... DRC), Layout vs. Schematic (LVS), and Physical Electrical Rule Check (PERC) using Calibre. • ... Build scalable toolchains to support multi-corner, multi-mode simulations and regression testing ...

NVIDIA Gruppe

Senior PDK Engineer

Santa Clara, CA · On-site

$168 - $264.50/hr

We are looking for someone with experience in DRC/LVS, HSPICE, RC extraction, and EM analysis ... Understanding basic fab process, mask generation, testing and qualification. * Background of mosfet ...

Meta

Audio Systems Engineer

Sunnyvale, CA

$144K/yr

Conduct HW and SW testing on consumer electronics, product benchmarking, and data collection for ... band DRC, and audio capture algorithms such as beamforming, echo cancellation, and noise ...

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How much do drc testing jobs pay per hour?

As of Aug 16, 2026, the average hourly pay for drc testing in California is $20.10, according to ZipRecruiter salary data. Most workers in this role earn between $17.07 and $21.59 per hour, depending on experience, location, and employer.

What is a DRC Testing?

A DRC (Design Rule Checking) Testing job involves verifying semiconductor chip layouts to ensure they meet manufacturing and design requirements. Engineers use specialized EDA (Electronic Design Automation) tools to detect and fix rule violations related to spacing, width, and other constraints. This role is essential in the chip design flow to prevent fabrication errors and optimize performance. DRC testers work closely with design and verification teams to improve layout quality and ensure compliance with industry standards.

What does a DRC Testing professional do?

Professionals in DRC Testing are responsible for designing and executing test cases, documenting results, and reporting defects using issue tracking systems. Their work often involves collaborating closely with development teams to troubleshoot and resolve problems, as well as verifying that fixes meet project requirements. Regular duties may also include maintaining test documentation, participating in team meetings, and contributing to continuous process improvement. By ensuring comprehensive testing and clear communication, they play a critical role in the successful deployment of software products.

What are the key skills and qualifications needed for DRC Testing?

To thrive in DRC Testing, candidates need a solid understanding of software testing methodologies, quality assurance processes, and a relevant background in computer science or engineering. Familiarity with testing tools such as Selenium, JIRA, or TestRail, and relevant certifications like ISTQB are often expected. Attention to detail, analytical thinking, and strong communication skills help individuals excel in diagnosing and reporting issues. These skills ensure effective identification and resolution of defects, contributing to the delivery of reliable, high-quality digital solutions.

What are the most commonly searched types of Drc Testing jobs in California?

The most popular types of Drc Testing jobs in California are:

What are popular job titles related to Drc Testing jobs in California?

For Drc Testing jobs in California, the most frequently searched job titles are:

What job categories do people searching Drc Testing jobs in California look for?

The top searched job categories for Drc Testing jobs in California are:

Drc Testing jobs near you
Infographic showing various Drc Testing job openings in California as of August 2026, with employment types broken down into 1% As Needed, 83% Full Time, 10% Part Time, 2% Temporary, 3% Contract, and 1% Nights. Highlights an 88% Physical, 3% Hybrid, and 9% Remote job distribution, with an average salary of $41,816 per year, or $20.1 per hour.

Analog Design Engineer

OMNIVISION

Santa Clara, CA • On-site

Full-time

This job post has expired today. Applications are no longer accepted.

Job description

Job Title: Analog Design Engineer 
 
Job Duties:
 
Conduct design and development of image sensor technologies, work on transistor level design of analog and mixed-signal circuits for CMOS Image Sensor such as asic_pixel array, column-amplifier, switch capacitor, comparator, ramp generator, ASRAM and XDEC by using Cadence Virtuoso. Work on whole chip floorplan design and pad frame. Work on analog and mixed signal circuits layout design by Cadence Virtuoso, such as column_array. Collaborate with layout engineer on whole chip layout integration and improvement by Cadence Virtuoso. Perform sub-blocks and whole image sensor readout circuit simulation by simulators such as Analog FastSPICE (AFS), Empyrean ALPS and NanoSpice. Perform design verification such as DRC, LVS, PERC check by using Siemens Caliber. Collaborate with Digital Engineer to define and design the analog to digital interface. Collaborate with verification, process, test, and application engineers to debug, characterize and optimize performance of fabricated image sensors. Propose innovative and creative solutions along with new circuit R&D and be ahead of current technology. Process the column readout data from the CMOS sensor using data processing software like Excel and MATLAB. Perform a performance check and conduct debug analysis based on the data results. Design the internal Discrete-time Circuits, Peripheral circuits and Timing control for a CMOS image sensor, including bias circuits, driver/level shifter, switched capacitor, logic gates and slew rate control. 
 
Requirements:
 
Master’s degree or foreign equivalent degree in Electrical Engineering, Computer Engineer, Electro-Optics, or a related field with graduate level course work of Analog IC Design, Data Converters, and VLSI Circuits and Technology.
 
Must possess the skills of:
 
  • Layout design and floor planning.
  • Testing and troubleshooting power IC.
  • Using lab equipment testing specific IC.
  • Photonic device manufacturing processes and principles, e.g. SPAD, CMOS sensors, Optical filters.
  • Matlab and Excel to do signal processing, imaging processing and data analysis.
  • Feedback, opamp, switched-capacitor circuits, layout and mismatch, and noise.
  • Data converter systems and circuits, including ADC and DAC architecture such as flash, two-step, pipelined, algorithmic, successive-approximation, R-2R DACs.
  • Analysis and design of modern digital circuits. Design and analyze CMOS digital circuit. Use commercial software Cadence. 
 
Annual base salary for this role in California, US is expected to be between $156,853 - $160,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.