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Drc Testing Jobs in California (NOW HIRING)

Analog Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

... DRC), Layout vs. Schematic (LVS), and Physical Electrical Rule Check (PERC) using Calibre. • ... Build scalable toolchains to support multi-corner, multi-mode simulations and regression testing ...

Conduct HW and SW testing on consumer electronics, product benchmarking, and data collection for ... band DRC, and audio capture algorithms such as beamforming, echo cancellation, and noise ...

Conduct design rule checks (DRC), signal‑integrity‑aware layout reviews, and manufacturability assessments. * Perform bring‑up and testing activities by collaborating with electrical engineers ...

Conduct design rule checks (DRC), signalintegrityaware layout reviews, and manufacturability assessments. * Perform bringup and testing activities by collaborating with electrical engineers and ...

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Drc Testing information

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How much do drc testing jobs pay per hour?

As of Sep 7, 2026, the average hourly pay for drc testing in California is $20.10, according to ZipRecruiter salary data. Most workers in this role earn between $17.07 and $21.59 per hour, depending on experience, location, and employer.

What is a DRC Testing?

A DRC (Design Rule Checking) Testing job involves verifying semiconductor chip layouts to ensure they meet manufacturing and design requirements. Engineers use specialized EDA (Electronic Design Automation) tools to detect and fix rule violations related to spacing, width, and other constraints. This role is essential in the chip design flow to prevent fabrication errors and optimize performance. DRC testers work closely with design and verification teams to improve layout quality and ensure compliance with industry standards.

What does a DRC Testing professional do?

Professionals in DRC Testing are responsible for designing and executing test cases, documenting results, and reporting defects using issue tracking systems. Their work often involves collaborating closely with development teams to troubleshoot and resolve problems, as well as verifying that fixes meet project requirements. Regular duties may also include maintaining test documentation, participating in team meetings, and contributing to continuous process improvement. By ensuring comprehensive testing and clear communication, they play a critical role in the successful deployment of software products.

What are the key skills and qualifications needed for DRC Testing?

To thrive in DRC Testing, candidates need a solid understanding of software testing methodologies, quality assurance processes, and a relevant background in computer science or engineering. Familiarity with testing tools such as Selenium, JIRA, or TestRail, and relevant certifications like ISTQB are often expected. Attention to detail, analytical thinking, and strong communication skills help individuals excel in diagnosing and reporting issues. These skills ensure effective identification and resolution of defects, contributing to the delivery of reliable, high-quality digital solutions.

What are the most commonly searched types of Drc Testing jobs in California?

The most popular types of Drc Testing jobs in California are:

What job categories do people searching Drc Testing jobs in California look for?

The top searched job categories for Drc Testing jobs in California are:

Infographic showing various Drc Testing job openings in California as of August 2026, with employment types broken down into 1% As Needed, 84% Full Time, 12% Part Time, 2% Contract, and 1% Nights. Highlights an 87% Physical, 3% Hybrid, and 10% Remote job distribution, with an average salary of $41,816 per year, or $20.1 per hour.

Analog Design Engineer

OMNIVISION

Santa Clara, CA • On-site

$156K - $160K/yr

Full-time

Re-posted 17 days ago


Job description

•    Conduct end-to-end design and development of advanced CMOS Image Sensor (CIS) technologies with a focus on transistor-level design, simulation, and verification of analog circuits using Cadence Virtuoso. 
•    Design analog building blocks such as Analog Static RAM (ASRAM), ensuring support for complex readout formats including Dual Conversion Gain (DCG), Correlated Double Sampling (CDS), Correlated Multiple Sampling (CMS), and 4c2p. 
•    Perform complete schematic design flow, closely collaborate with layout engineers on device matching, symmetry, shielding, and routing for optimal noise performance and area efficiency. 
•    Carry out comprehensive post-layout verification, including Parasitic Extraction (PEX), Design Rule Check (DRC), Layout vs. Schematic (LVS), and Physical Electrical Rule Check (PERC) using Calibre.
•    Conduct system-level analog simulation and CIS signal chain verification to ensure correct signal propagation from pixel through the entire analog front-end to digital input interface.
•    Execute extensive process, voltage and temperature (PVT) and Monte Carlo simulations to evaluate functional robustness, and performance margins. 
•    Perform IR drop analysis and power integrity verification to ensure reliable power delivery and layout feasibility.
•    Utilize Analog FastSPICE (AFS), Empyrean ALPS, and NanoSpice for block-level and full-chain validation under realistic operating scenarios.
•    Develop and maintain automation scripts in Python and Perl to streamline simulation flow, including netlist generation, corner sweeping, batch result parsing, and yield analysis. Build scalable toolchains to support multi-corner, multi-mode simulations and regression testing, enhancing design turnaround and validation coverage.
•    Collaborate with cross-functional teams with digital design, verification, process, and test to define analog-digital interface specifications, establish timing constraints, support readout calibration algorithms, and debug post-silicon performance issues. 
•    Participate in design reviews, tapeout signoff, and lab characterization, contributing to silicon bring-up and performance optimization.
Requirements:
Master’s degree in Electrical Engineering, Computer Engineering, or a related field with advanced-level courses work in Analog Integrated Circuit, CMOS Circuit Design, RF Circuits and Systems Design, VLSI system design, and VLSI Signal Processing.
Must possess the following skills:
•    Analog circuits using MOS models,
•    Operational amplifier and current mirror design,
•    Noise analysis and feedback system,
•    Evaluation of offset distortion and nonlinearity,
•    Functional verification using ModelSim,
•    Static timing analysis, power and area estimation,
•    Standard-cell based logic and physical synthesis,
•    Hardware scheduling and retiming,
•    Number representation and digital arithmetic,
•    Full analog IC design flow,
•    Post-tapeout chip testing and validation,
•    VLSI circuit and system design using Verilog,
•    Architecture design space exploration,
•    Spectrum Analyzer.
Annual base salary for this role in California, US is expected to be between $156,853 - $160,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.