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Director Compiler Engineer Jobs in Arizona (NOW HIRING)

Director Compiler Engineer information

What are the key skills and qualifications needed to thrive as a Director Compiler Engineer, and why are they important?

To thrive as a Director Compiler Engineer, you need deep expertise in compiler theory, programming languages, and computer architecture, often supported by an advanced degree in computer science or a related field. Proficiency with compiler toolchains (like LLVM or GCC), performance analysis tools, and version control systems is typically required, along with familiarity with modern programming languages such as C++ or Rust. Strong leadership, strategic thinking, and excellent communication skills are essential for guiding teams and collaborating with stakeholders. These skills ensure the development of robust, high-performance compiler solutions that align with organizational goals and technology strategies.

What are some common challenges faced by a Director Compiler Engineer, and how can they be addressed?

A Director Compiler Engineer often encounters challenges such as leading teams through complex technical problems, balancing project timelines with innovation, and ensuring cross-functional collaboration between hardware and software teams. Addressing these requires strong leadership, clear communication, and strategic planning to allocate resources efficiently. Additionally, staying up-to-date with evolving programming languages and hardware architectures is essential to guide the team and maintain competitive compiler performance.

What does a Director Compiler Engineer do?

A Director Compiler Engineer leads teams responsible for designing, developing, and optimizing compiler technologies that translate high-level programming languages into machine code. They oversee the overall strategy, architecture, and performance of compiler products, ensuring they meet the needs of software developers and hardware platforms. In addition to managing projects and technical direction, they often collaborate with other engineering teams, mentor staff, and keep up with advances in programming languages and processor architectures.

What is the difference between Director Compiler Engineer vs Compiler Engineer?

AspectDirector Compiler EngineerCompiler Engineer
ResponsibilitiesOversees compiler development teams, sets strategic goals, manages project timelinesDesigns, develops, and tests compiler components and features
Required CredentialsBachelor's or Master's in Computer Science, extensive experience in compiler development, leadership skillsBachelor's or Master's in Computer Science, strong programming skills, experience with compiler tools
Work EnvironmentLeadership roles in tech companies, collaborative team settingsDevelopment teams, coding environments, research labs
Industry UsageCommon in large tech firms, software companies, and organizations with complex compiler needsUsed across software development, embedded systems, and research projects

The main difference is that a Director Compiler Engineer focuses on leadership, strategy, and team management, while a Compiler Engineer concentrates on technical development and coding tasks. Both roles require strong technical skills, but the director role involves overseeing projects and guiding teams.

What are the most commonly searched types of Compiler Engineer jobs in Arizona? The most popular types of Compiler Engineer jobs in Arizona are:
What are popular job titles related to Director Compiler Engineer jobs in Arizona? For Director Compiler Engineer jobs in Arizona, the most frequently searched job titles are:
What job categories do people searching Director Compiler Engineer jobs in Arizona look for? The top searched job categories for Director Compiler Engineer jobs in Arizona are:
What cities in Arizona are hiring for Director Compiler Engineer jobs? Cities in Arizona with the most Director Compiler Engineer job openings:
Senior Physical Design Application Engineer

Senior Physical Design Application Engineer

Intel

Phoenix, AZ

Full-time

Medical, Retirement, PTO

Posted 25 days ago


Intel rating

8.8

Company rating: 8.8 out of 10

Based on 143 frontline employees who took The Breakroom Quiz

8th of 137 rated electronics manufacturers


Job description

Job Details:Job Description: 

About Intel Foundry

Intel Foundry is a systems foundry transforming the global semiconductor industry by deliveringcutting-edgesilicon process and packaging technology leadership for the AI era.Intel Foundry will be differentiated from other foundries by our world classindustry-leadingIPportfoliothat customers can choose from including, rich IP ecosystem including x86 cores, graphics, AI, and Arm/RISC-V IPs, world-class design services, and operationally resilient global manufacturing with committed capacity in the US and Europe.

Position Overview

We seek aSeniorApplications and Solutions Engineerto provide technical support to Intel Foundry Services customers on PDKs, digital reference flows, and design signoff methodologies withspecializedfocus on Cadence tool suites. This role drives quality improvements in design kits through ASIC design reference flow validation and supports customers through successful tape-outs.

Key Responsibilities

Customer TechnicalSupport & Implementation

  • Provide comprehensive technical support to Intel Foundry Services customers on PDKs, digital reference flows, and digital design signoff methodologies
  • Support and deliver ASIC/Digital tool/flow/methodologysolutions using Cadence tool suites to address customer issues and ensure successful tape-outs
  • Drive customer success through expert guidance on advanced CMOS process implementation

Quality Assurance & Documentation

  • Drive quality improvements in design kits and documentation through ASIC design reference flow validation and comprehensive documentation review
  • Create application notes, technical content, and deliver training presentations to customers and internal teams
  • Establish andmaintainquality assurance processes for design flow validation

Design Flow Development & Optimization

  • Develop andoptimizedigital design implementation flows for advanced CMOS processes
  • Support hierarchical and multi-voltage domain design approaches,timingand physical convergence
  • Build andmaintainquality assurance (QA) regression frameworks for design validation


Core Competencies

  • Self-driven and results-oriented with ability to manage multiple tasks effectively
  • Strong teamwork skills to drive solutionsfor customer designimplementation challenges
  • Analytical problem-solving capabilities for complex design issues
  • Excellent communication skills with experience in collaboration and customer feedback
Qualifications:

The Minimum qualificationsare required tobe considered for this position. Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to theminimumrequirements and are considered a plus factor inidentifyingtop candidates.

Minimum Qualifications

  • US Citizenshiprequired
  • Ability to obtain a US Government Security Clearance
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or STEM-related fieldof study
  • 4+ yearsofexperience with advanced CMOS processes (22nm and below)
  • 3+ yearsofexperience in ASIC physical design implementation and/or ASIC design signoff (SoC/ASIC)
  • 3+ yearsofexperienceinone of the followingscripting languages (i.e.Python, Perl,Tcl, shell scripting)

Preferred Qualifications

  • Active US Government Security Clearance with a minimum of Secret level
  • Post Graduate degree in Electrical / Computer Engineering, Computer Science, or in a STEM related field of study
  • Customer-facing experience in technical support roles
  • Experience withstate-of-the-artprocess technology (7nm and below)
  • Hands-on experience in Cadence EDA-based ASIC design implementation including full-chip integration, synthesis, APR, static timing analysis, layout verification, and reliability verification
  • Proficiencywith Cadence EDA tools and flows:Innovus, Tempus,TempusECO, Pegasus,Voltus
  • Experience with Synopsys tools (Fusion Compiler,PrimeTime, Prime ECO, ICV) is a plus
  • Experience with hierarchical and multi-voltage domain design, top-down design, budgeting, and correlation across implementation and verification tools

What We Offer

  • Opportunity to work withcutting-edgedigital design technologies for foundry services
  • Direct customer engagement and technical leadership in advanced semiconductor design
  • Access to Intel's most advanced foundry technologies and comprehensive EDA tool suites
  • Competitive compensation
  • Professional development in digital design methodologies and foundry services
  • Direct impact on foundry customer success and advanced semiconductor innovation

#cj

Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Arizona, PhoenixAdditional Locations:US, California, Santa Clara, US, Oregon, HillsboroBusiness group:The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968