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Digital Implementation Jobs (NOW HIRING)

Cadence

Software Engineer II

San Jose, CA · On-site

$101K - $188K/yr

Innovus is Cadence's flagship digital implementation platform, enabling customers to design advanced semiconductor chips from RTL to GDSII. In this role, you will contribute to the development of ...

Cadence Design Systems

$126K - $234K/yr

As an expert Digital Implementation and Signoff Field Applications Engineering (AE) , you will work side‑by‑side with our leading edge customers. With your expertise, you'll help them deploy ...

Roguebeam

Sr DSP / RTL Engineer

Seattle, WA · On-site

$154K/yr

As one of our early senior digital hires, you will define processing architecture, develop beamforming and adaptive algorithms, and implement key blocks in RTL--bridging the gap from concept to ...

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How much do digital implementation jobs pay per year?

As of Sep 10, 2026, the average yearly pay for digital implementation in the United States is $112,486.00, according to ZipRecruiter salary data. Most workers in this role earn between $80,000.00 and $141,000.00 per year, depending on experience, location, and employer.

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The most popular types of Digital Implementation jobs are:

What are popular job titles for Digital Implementation?

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Infographic showing various Digital Implementation job openings in the United States as of August 2026, with employment types broken down into 85% Full Time, 11% Part Time, 1% Temporary, and 3% Contract. Highlights an 88% Physical, 3% Hybrid, and 9% Remote job distribution, with an average salary of $112,486 per year, or $54.1 per hour.

CAD and Integration Engineer, Silicon

Sunnyvale, CA

Meta
Internet and IT • 10K+ employees
Learn more about Metaexternal

$178K/yr

Full-time

Re-posted 15 hours ago

Meta rating

7.8

Company rating: 7.8 out of 10

Based on 45 frontline employees who took The Breakroom Quiz

Job description

Meta is seeking a lead CAD and integration engineer to shape the methodology and physical implementation infrastructure for our custom silicon programs. Working at the intersection of circuit design, digital implementation, and physical verification, you will define and own the CAD flows that take designs from RTL and schematic intent through to foundry-ready GDS deliverables. You will establish best practices across synthesis, place-and-route, analog mixed-signal integration, and physical signoff, while building automation frameworks and integrating AI-assisted design tools to accelerate engineering velocity across the silicon team.
CAD and Integration Engineer, Silicon Responsibilities:
  • Define and own end-to-end digital implementation methodology including RTL-to-GDS flows, synthesis, place-and-route, DFT insertion, and multi-corner physical signoff
  • Lead analog mixed-signal physical integration strategy, establishing constraint authoring, floorplanning guidelines, and interface protocols between custom and digital domains
  • Develop and maintain CAD automation infrastructure using Python, SKILL, and Tcl to reduce manual effort across implementation, tapeout, and regression workflows
  • Integrate AI and LLM-assisted coding tools into CAD methodology to improve design automation productivity across the silicon engineering organization
  • Drive physical signoff convergence across timing, power, noise, and design rule checks to produce foundry-ready deliverables on schedule
  • Establish 3D integration and heterogeneous packaging flows including die-to-die interface planning, cross-die timing closure, and bump/interposer constraint management
  • Partner with foundry contacts on PDK qualification, design rule interpretation, and process design kit updates for leading-edge technology nodes
  • Define low-power implementation methodology including multi-voltage domain integration, UPF-based power intent authoring, and power analysis signoff
  • Provide technical direction to other engineers on CAD methodology decisions, flow architecture, and implementation best practices across multiple concurrent tapeout programs
  • Communicate implementation status, methodology decisions, and risk assessments to circuit designers, layout engineers, and program leadership

Minimum Qualifications:
  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
  • 8+ years of industry experience in VLSI CAD, physical implementation, or silicon design methodology across multiple technology nodes and tapeouts
  • Expertise in full RTL-to-GDS digital implementation flows including synthesis, place-and-route, DFT, and multi-corner physical signoff using industry-standard EDA tools
  • Experience with analog mixed-signal physical integration including constraint authoring, floorplan coordination, and interface management between custom and digital design domains
  • Proficiency in scripting and automation using Python, SKILL, Tcl, or equivalent languages to build and maintain CAD flow infrastructure
  • Experience communicating methodology decisions, tapeout risk, and implementation status to cross-functional partners including circuit designers, layout engineers, and foundry contacts

Preferred Qualifications:
  • Experience with 3D stacking or advanced packaging flows including die-to-die interface planning, cross-die timing analysis, and heterogeneous integration methodology
  • Experience with PDK qualification and design rule development in direct collaboration with foundry partners on leading-edge process nodes
  • Background in low-power design methodology including UPF-based power intent, multi-voltage domain integration, and power signoff for mobile or wearable silicon applications
  • Familiarity with AI-assisted design tools or LLM-based coding assistants applied to CAD automation or implementation flow development

About Meta:
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.
Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.
Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@meta.com.
$178,000/year to $250,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.

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