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Digital Design Verification Engineering Intern Jobs

Design Verification Engineer

San Diego, CA · On-site

$144K - $176K/yr

Excellent knowledge of Verilog and digital design fundamentals. * Experience with industry-standard ... Education Bachelor''s or Master''s degree in Electronics Engineering, Computer Engineering, or a ...

Design Verification Engineer

San Jose, CA · On-site

$159K - $194K/yr

Role: Design Verification Engineer Location: San Jose, CA - Onsite Contract: 6+ Months with ... digital design fundamentals · Experience with debug tools (Verdi, DVE, etc.) Good to Have: · ...

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Associate Design Verification Engineer

Dallas, TX · On-site +1

$134K - $164K/yr

Bachelor's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science, or a related field. * 0-2 years of experience in digital design verification or a related ...

Design Verification Engineer

San Jose, CA

$159K - $194K/yr

S. in Computer Science, Computer Engineering, or related field * 5+ years relevant industry experience * Strong understanding of digital design, SoC architecture, and verification methodologies

Silicon Design Verification Engineer

San Jose, CA · On-site

$159K - $194K/yr

The Verification Engineering team furthers and encourages continuous technical innovation to ... Plan verification of complex digital design blocks by fully understanding the architecture and ...

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Digital Design Verification Engineering Intern information

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How much do digital design verification engineering intern jobs pay per hour?

As of Sep 10, 2026, the average hourly pay for digital design verification engineering intern in the United States is $19.38, according to ZipRecruiter salary data. Most workers in this role earn between $14.42 and $21.63 per hour, depending on experience, location, and employer.

What are popular job titles related to Digital Design Verification Engineering Intern jobs?

For Digital Design Verification Engineering Intern jobs, the most frequently searched job titles are:

Design Verification Engineer

San Diego, CA • On-site

Sivaltech
Semiconductor and Electronic Component Manufacturing • 51 - 200 employees

$144K - $176K/yr

Other

Re-posted 7 days ago


Job description

Design Verification Engineer

Location: Bay Area, CA (Onsite/Hybrid)
Experience: 8+ Years

Job Summary

We are seeking an experienced Design Verification Engineer with strong expertise in ASIC/SoC verification to join our semiconductor team. The ideal candidate will have extensive experience in SystemVerilog, UVM, and protocol verification, with a proven track record of developing robust verification environments and achieving coverage closure.

Key Responsibilities
  • Develop and execute comprehensive verification plans for ASIC/SoC designs.

  • Build reusable UVM-based verification environments, testbenches, scoreboards, checkers, and assertions.

  • Create and execute directed and constrained-random test cases.

  • Perform functional, code, assertion, and toggle coverage analysis and drive coverage closure.

  • Debug RTL and simulation issues in collaboration with design teams.

  • Verify complex IPs and SoCs at block, subsystem, and chip level.

  • Work closely with RTL designers, architects, and physical design teams throughout the development lifecycle.

  • Participate in regression execution, bug tracking, and verification sign-off.

Required Skills
  • 8+ years of ASIC/SoC Design Verification experience.

  • Strong expertise in SystemVerilog and UVM.

  • Excellent knowledge of Verilog and digital design fundamentals.

  • Experience with industry-standard simulators such as Synopsys VCS, Cadence Xcelium, or Siemens QuestaSim.

  • Strong debugging and scripting skills using Python, Perl, Shell, or Tcl.

  • Experience with assertions (SVA), constrained-random verification, and functional coverage.

  • Familiarity with version control systems such as Git.

Preferred Experience
  • Chip-level and SoC verification.

  • Verification of high-speed bus protocols such as AXI, AHB, APB, PCIe, USB, Ethernet, DDR, MIPI, or UCIe.

  • Low-power verification using UPF/CPF.

  • Experience with emulation or FPGA prototyping is a plus.

Education

Bachelor''s or Master''s degree in Electronics Engineering, Computer Engineering, or a related field.

Employment Type: Full-Time

If you are passionate about ASIC verification and have hands-on experience with modern verification methodologies, we''d love to hear from you.