As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
$16.50 - $21.50/hr
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
$16.50 - $21.50/hr
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
$16 - $20.75/hr
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
$16 - $20.75/hr
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
$16.75 - $21.50/hr
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
$16.75 - $21.50/hr
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
Design Verification Engineering Intern - MS/PhD
Dallas, TX · On-site
$15.25 - $19.75/hr
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
Design Verification Engineering Intern - MS/PhD
Dallas, TX · On-site
$15.25 - $19.75/hr
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
Design Verification Engineering Intern - MS/PhD
Knoxville, TN · On-site
$16 - $20.75/hr
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
Design Verification Engineering Intern - MS/PhD
Knoxville, TN · On-site
$16 - $20.75/hr
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
Digital Design Verification Engineer
Austin, TX · On-site
£123K/yr
The Role We are seeking highly skilled and motivated Senior / Staff Digital Verification Engineers with a strong background in CMOS digital design and verification to take ownership of the functional ...
Digital Design Verification Engineer
Austin, TX · On-site
£123K/yr
The Role We are seeking highly skilled and motivated Senior / Staff Digital Verification Engineers with a strong background in CMOS digital design and verification to take ownership of the functional ...
Design Verification Engineering Intern - MS/PhD
Dallas, TX · On-site
$15.25 - $19.75/hr
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
Design Verification Engineering Intern - MS/PhD
Dallas, TX · On-site
$15.25 - $19.75/hr
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
Design Verification Engineering Intern - MS/PhD
$15.25 - $19.75/hr
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
Design Verification Engineering Intern - MS/PhD
$15.25 - $19.75/hr
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
Design Verification Engineering Intern - MS/PhD
Phoenix, AZ · On-site
$16.75 - $21.50/hr
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
Design Verification Engineering Intern - MS/PhD
Phoenix, AZ · On-site
$16.75 - $21.50/hr
As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...
Digital Design Verification Engineering Intern information
See salary details
$9.13 - $11.65
9% of jobs
$11.65 - $14.16
8% of jobs
$14.81 is the 25th percentile. Wages below this are outliers.
$14.16 - $16.67
28% of jobs
The median wage is $17.34 / hr.
$16.67 - $19.19
16% of jobs
$20.91 is the 75th percentile. Wages above this are outliers.
$19.19 - $21.70
20% of jobs
$21.70 - $24.21
9% of jobs
$24.21 - $26.73
4% of jobs
$26.73 - $29.24
1% of jobs
$29.24 - $31.75
1% of jobs
$31.75 - $34.27
1% of jobs
$34.27 - $36.78
2% of jobs
$9
$19
$36
How much do digital design verification engineering intern jobs pay per hour?
As of Sep 9, 2026, the average hourly pay for digital design verification engineering intern in the United States is $19.38, according to ZipRecruiter salary data. Most workers in this role earn between $14.42 and $21.63 per hour, depending on experience, location, and employer.
What are popular job titles related to Digital Design Verification Engineering Intern jobs?
For Digital Design Verification Engineering Intern jobs, the most frequently searched job titles are:
Design Verification Engineering Intern - Bachelors
Texas Instruments •
Semiconductor and Electronic Component Manufacturing • 10K+ employees10,000+ employees
Internship
Posted 5 days ago
Texas Instruments rating
8.1
Based on 86 frontline employees who took The Breakroom Quiz
53rd of 162 rated electronics manufacturers
Job description
JOB DESCRIPTION
We can't predict what the future holds, but we know Texas Instruments will have a part in shaping it.
As a Design Verification intern in this group, you will be responsible for:
- Developing detailed verification plans while working closely with the design and system team to ensure pre- silicon verification success
- Developing test benches, tests and simulations to DUT behavior
- Running coverage regressions to meet the defined coverage goals for SystemVerilog functional coverage models of mixed-signal circuits for voltages and currents, real numbers, integers, and traditional digital functional coverage.
- Tracking and communicating verification status, issues, and concerns
- Work with regression tools and develop scripts to submit cases for regression analysis
- Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital circuits.
- Constrained-random stimulus and auto-checking verification environments, especially constrained-random analog stimulus.
- Contribute to continuous improvements for quality and efficiency on DV strategy, tools, methods and flows
Put your talent to work with us as a Design Engineer Intern - change the world, love your job!
Texas Instruments will not sponsor job applicants for visas or work authorization for this position.
QUALIFICATIONS
Minimum requirements:
- Currently pursuing a Bachelors degree in Electrical Engineering, Computer Engineering or Electrical & Computer Engineering
- Cumulative 3.0/4.0 GPA or higher
Preferred qualifications:
- Ability to establish strong relationships with key stakeholders critical to success, both internally and externally
- Strong verbal and written communication skills
- Ability to quickly ramp on new systems and processes
- Demonstrated strong interpersonal, analytical and problem-solving skills
- Ability to work in teams and collaborate effectively with people in different functions
- Ability to take the initiative and drive for results
- Strong time management skills that enable on-time project delivery
What Texas Instruments employees say
Pay
Benefits
Hours and flexibility
Workplace
Get the full story on Breakroom
About Texas Instruments
Sourced by ZipRecruiter
As a global semiconductor company, we design, manufacture, test and sell analog and embedded processing chips to nearly 100,000 customers. Our products enable electronics everywhere and in things you experience every day - from health care, smart homes and connected cars to drones, smart phones and more. Our passion to create a better and more sustainable world by making electronics more affordable through semiconductors drives us to make our technology smaller, more efficient, more reliable and more affordable.
Industry
Semiconductor and electronic component manufacturing
Company size
10,000+ Employees
Headquarters location
Dallas, TX, US
Year founded
1930