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Digital Design Engineer Intern Jobs in California

Phizenix

Digital Design Engineer

Santa Clara, CA · On-site

$180K - $250K/yr

: Role Overview We are seeking an ASIC Design Engineer to own digital design, integration, and bring-up for production-grade high-speed interconnect silicon. You will translate micro-architecture into ...

Syntiant

Digital Design Engineer

San Diego, CA · On-site

$190K - $240K/yr

We are seeking a lead Digital Design Engineer who will be designing the digital systems and building blocks for MEMS microphones. Together with the analog/mixed-signal designers, test development ...

Medium

Digital Design Engineer

Saratoga, CA · On-site

$130 - $225/hr

We are seeking experienced Digital Design Engineers to join our Satellite Avionics team. In this role you will own the electrical design of complex digital boards for a next-generation satellite ...

New

OMNIVISION

Sr. Digital Design Engineer

Irvine, CA

$120K - $150K/yr

We are looking for Digital Design Engineer for design and development of next generation image sensors and related technologies. The candidate should have strong fundamentals in digital circuit ...

Syntiant

Digital Design Engineer

San Diego, CA

$190K - $240K/yr

We are seeking a lead Digital Design Engineer who will be designing the digital systems and building blocks for MEMS microphones. Together with the analog/mixed-signal designers, test development ...

OMNIVISION

Sr. Digital Design Engineer

Irvine, CA · On-site

$120K - $150K/yr

Description We are looking for Digital Design Engineer for design and development of next generation image sensors and related technologies. The candidate should have strong fundamentals in digital ...

Syntiant

Digital Design Engineer

San Diego, CA · On-site

$190K - $240K/yr

We are seeking a lead Digital Design Engineer who will be designing the digital systems and building blocks for MEMS microphones. Together with the analog/mixed-signal designers, test development ...

E-Space

Digital Design Engineer

Saratoga, CA

$130K - $225K/yr

We are seeking experienced Digital Design Engineers to join our Satellite Avionics team. In this role you will own the electrical design of complex digital boards for a next-generation satellite ...

E-Space

Digital Design Engineer

Saratoga, CA · On-site

$130K - $225K/yr

We are seeking experienced Digital Design Engineers to join our Satellite Avionics team. In this role you will own the electrical design of complex digital boards for a next-generation satellite ...

E-Space

Digital Design Engineer

Saratoga, CA · On-site

$130K - $225K/yr

We are seeking experienced Digital Design Engineers to join our Satellite Avionics team. In this role you will own the electrical design of complex digital boards for a next-generation satellite ...

CivicMinds, Inc.

RTL / Digital Design Engineer

San Diego, CA · On-site

$145K/yr

RTL/Digital design engineers will design and implementation of SoC, Peripherals, Graphics, Modem, Bus and Network-on-chip cores. These candidates will understand and work on all aspects of the VLSI ...

Astera Labs

Principal Digital Design Engineer

San Jose, CA · On-site

$185K - $230K/yr

Role Overview Join Astera Labs as a Principal Digital Design Engineer to architect and implement next-generation digital designs for high-performance AI connectivity solutions. You'll own complex ...

Silanna Semi

Senior Digital Design Engineer

San Diego, CA · On-site

$200 - $250/hr

Silanna Semiconductors is actively seeking an experienced Senior Digital Design Engineer to contribute to the design and development of integrated circuit solutions related to Silanna's innovative ...

New

Astera Labs

Principal Digital Design Engineer

San Jose, CA · On-site

$185K - $230K/yr

Role Overview Join Astera Labs as a Principal Digital Design Engineer to architect and implement next-generation digital designs for high-performance AI connectivity solutions. You'll own complex ...

Astera Labs

Principal Digital Design Engineer

San Jose, CA · On-site

$159K/yr

Hold a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field. * 5-10 years of experience in digital design for high-speed DSP data path.

Apple

ASIC Digital Design Engineer Lead

Cupertino, CA · On-site

$167K/yr

Minimum Qualifications BS degree Digital design engineering experience Preferred Qualifications 10+ Years of relevant industry experience. Hands-on experience with FPGA emulation, silicon bring-up ...

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All JobsDigital Design Engineer Intern JobsDigital Design Engineer Intern Jobs in California

Digital Design Engineer Intern information

See California salary details

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How much do digital design engineer intern jobs pay per hour?

As of Aug 8, 2026, the average hourly pay for digital design engineer intern in California is $19.12, according to ZipRecruiter salary data. Most workers in this role earn between $14.23 and $21.35 per hour, depending on experience, location, and employer.

What is the difference between Digital Design Engineer Intern vs Digital IC Design Engineer?

AspectDigital Design Engineer InternDigital IC Design Engineer
Required CredentialsEnrolled in or recent graduate of Electrical Engineering or Computer EngineeringBachelor's or Master's in Electrical Engineering, Computer Engineering, or related field
Work EnvironmentInternship, often in a corporate or research lab settingFull-time professional role, often in semiconductor or electronics companies
Employer & Industry UsageUsed in tech companies, startups, and research institutions for entry-level rolesUsed in semiconductor, electronics, and integrated circuit design companies

The Digital Design Engineer Intern typically is a student or recent graduate gaining hands-on experience, while the Digital IC Design Engineer is a full-time professional responsible for designing integrated circuits. Both roles require knowledge of digital logic, hardware description languages, and circuit design, but differ mainly in experience level and job responsibilities.

What types of projects and responsibilities can a digital design engineer intern typically expect during their internship?

As a Digital Design Engineer Intern, you can expect to work on a variety of tasks such as assisting with the design and verification of digital circuits, creating testbenches using hardware description languages (like Verilog or VHDL), and collaborating with senior engineers on simulation and debugging. Your day-to-day may involve participating in design reviews, documenting your work, and learning how to use industry-standard EDA tools. It's common to work closely with both hardware and software teams, providing a great opportunity to develop technical and teamwork skills while contributing to meaningful projects.

What does a digital design engineer intern do?

A Digital Design Engineer Intern assists in designing, testing, and validating digital circuits and systems, often using hardware description languages like VHDL or Verilog. They work under the supervision of experienced engineers to develop, simulate, and debug digital components such as processors, memory units, or communication interfaces. Responsibilities may also include documenting designs, running test benches, and collaborating with teams to implement digital solutions. This internship helps students gain practical experience in digital electronics and design methodologies.

What are the key skills and qualifications needed to thrive as a digital design engineer intern, and why are they important?

To thrive as a Digital Design Engineer Intern, you need a solid understanding of digital logic design, familiarity with hardware description languages (such as Verilog or VHDL), and progress toward a degree in electrical or computer engineering. Proficiency in simulation tools like ModelSim, FPGA development environments, and PCB design software is typically required. Strong problem-solving skills, attention to detail, and effective teamwork and communication abilities help interns excel in collaborative project settings. These skills and qualities are crucial for designing, testing, and implementing reliable digital systems while contributing effectively to engineering teams.
What are the most commonly searched types of Digital Design Engineer jobs in California? The most popular types of Digital Design Engineer jobs in California are:
What are popular job titles related to Digital Design Engineer Intern jobs in California? For Digital Design Engineer Intern jobs in California, the most frequently searched job titles are:
What job categories do people searching Digital Design Engineer Intern jobs in California look for? The top searched job categories for Digital Design Engineer Intern jobs in California are:
What cities in California are hiring for Digital Design Engineer Intern jobs? Cities in California with the most Digital Design Engineer Intern job openings:
Digital Design Engineer Intern jobs near you
Infographic showing various Digital Design Engineer Intern job openings in California as of August 2026, with employment types broken down into 1% Internship, 76% Full Time, 17% Part Time, 2% Temporary, and 4% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $39,777 per year, or $19.1 per hour.

Digital Design Engineer

Phizenix

Santa Clara, CA • On-site

$180K - $250K/yr

Full-time

Posted 18 days ago

Job description

Job description :

Role Overview

We are seeking an ASIC Design Engineer to own digital design, integration, and bring-up for production-grade high-speed interconnect silicon. You will translate micro-architecture into clean, high-quality RTL and drive it through synthesis and timing closure. Just as important, the ideal candidate leverages strong firmware coding experience to drive pre-silicon simulation, develop bare-metal diagnostics, and ensure seamless hardware-software integration—for example, writing firmware on an embedded RISC CPU IP to control on-chip analog hardware blocks and low-speed control/calibration loops for optical components. Strong digital ASIC fundamentals, paired with the ability to debug complex designs in emulation and on silicon, round out the profile.

Key Responsibilities

  • Develop micro-architecture and author high-quality, synthesizable RTL following best-in-class coding methods and design-for-verification / design-for-test practices.
  • Write firmware and bare-metal diagnostics on embedded RISC CPU IP to configure and control on-chip analog blocks and low-speed control/calibration loops for optical components.
  • Drive pre-silicon simulation and hardware-software co-verification, validating firmware against RTL well ahead of tape-out.
  • Integrate processor subsystems—including licensed CPU IP—AMBA fabrics, and serial/interconnect interfaces (e.g., PCIe, UCIe) into the SoC/ASIC.
  • Drive the full implementation flow: synthesis, timing constraints (SDC), timing closure, and equivalence checking (Formality / Conformal), with clean Lint / CDC / RDC signoff.
  • Build and run emulation environments; lead silicon bring-up sequences and post-silicon debug, root-causing and resolving issues on hardware.
  • Provide responsive support—triaging design problems and delivering timely solutions—and collaborate with analog/mixed-signal, DSP, verification, and physical-design teams.

Required Qualifications

Education & Experience

  • B.S. or M.S. in Electrical/Electronics or Computer Engineering (or related), with relevant digital ASIC design experience.
  • Demonstrated experience taking digital designs from RTL through synthesis, timing closure, and silicon bring-up.

Core Technical Skills

  • Strong fundamentals in digital ASIC design, micro-architecture, and best RTL coding methods.
  • Firmware / embedded C development, including bare-metal programming on an on-chip RISC CPU IP (e.g., RISC-V or Arm) to drive analog blocks and low-speed loops.
  • Knowledge of AMBA and serial protocols, processors, and silicon bring-up sequences.
  • Strong design, emulation, and silicon debug skills, with proven hardware-software integration experience.
  • Expertise in synthesis, constraints, timing closure, and equivalence checks (Formality / Conformal).
  • Experience with Lint / CDC / RDC tools.

Professional Skills

  • Customer-support orientation and excellent communication and oratory skills.

Preferred Qualifications

  • Familiarity with interconnect protocols such as PCIe (Gen5/6/7) and UCIe.
  • Experience integrating vendor CPU IP and developing the associated firmware, drivers, and diagnostics.
  • High-speed wireline / SerDes-based SoC experience; UPF low-power design, DFT, and scan/ATPG flows.
  • Scripting proficiency (Python, Tcl)
California Pay Range
$180,000—$250,000 USD