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Design Verification Jobs in Austin, TX (NOW HIRING)

As a Design Verification Engineer, you will be part of a team working with experienced engineers across the industry, focused on developing advanced ASIC solutions for Meta's data center applications.

ASIC Engineer, Design Verification Responsibilities: * Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification * Develop ...

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job within Apple's Hardware Technology and we'd love ...

Design Verification Engineer

Austin, TX

$134K - $164K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job within Apple's Hardware Technology and we'd love ...

Design Verification Engineer

Austin, TX

$134K - $164K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job within Apple's Hardware Technology organization ...

Design Verification Engineer

Austin, TX

$134K - $164K/yr

We have an opportunity for an outstandingly hardworking design verification engineer. As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft upcoming ...

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job within Apple's Hardware Technology organization ...

Design Verification Engineer

Austin, TX

$134K - $164K/yr

We have an opportunity for an outstandingly hardworking design verification engineer! As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft upcoming ...

Design Verification Engineer

Austin, TX

$134K - $164K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job within Apple's Hardware Technology organization ...

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

We have an opportunity for an outstandingly hardworking design verification engineer. As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft upcoming ...

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job within Apple's Hardware Technology organization ...

Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job within Apple's Hardware Technology organization ...

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

We have an opportunity for an outstandingly hardworking design verification engineer! As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft upcoming ...

We're hiring experienced Design Verification Engineers to play a key role in developing and verifying the designs that will bring our next-generation AI processors to life. About Us: Mythic is ...

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

D degree in Electrical / Communications Engineering - 3+ years in digital verification, preferably in communication systems - Familiarity with Matlab - Modem design verification experience - System C ...

Design Verification Lead Engineer Job location: Austin, TX Job Duration: 3 Months, Contract to Hire * 10+ years of experience in pre-silicon design verification * Proficiency in C-shell scripting ...

Meta is hiring an ASIC Design Verification Engineer within the Infrastructure Silicon organization. We are looking for individuals with experience in Design Verification to build IP and System on ...

Showing results 21-40

Design Verification information

See Austin, TX salary details

$104.6K

$147.8K

$165.5K

How much do design verification jobs pay per year?

As of Aug 10, 2026, the average yearly pay for design verification in Austin, TX is $147,839.00, according to ZipRecruiter salary data. Most workers in this role earn between $134,800.00 and $164,500.00 per year, depending on experience, location, and employer.

What is the difference between Design Verification vs Design Validation?

AspectDesign VerificationDesign Validation
PurposeEnsures the design meets specified requirements through testing and analysisConfirms the final product fulfills user needs and intended use
TimingDuring the development phaseAfter the product is developed and before release
MethodsInspections, reviews, testing, analysisUser testing, field trials, real-world testing
FocusDesign correctness and complianceProduct effectiveness and user satisfaction

While Design Verification checks if the design meets specified requirements during development, Design Validation ensures the final product performs effectively in real-world conditions. Both are essential steps in the product development process to deliver a reliable and user-centered product.

What is a design verification engineer?

Design verification engineers are professionals who ensure that hardware or software designs meet their intended specifications and function correctly before production or release. They develop and execute tests, write verification plans, create simulation environments, and identify design flaws or errors. Their work is critical in industries like semiconductor, electronics, and software development to prevent costly mistakes and ensure high-quality products. Design verification engineers often work closely with design and validation teams throughout the product development lifecycle.

What are the key skills and qualifications needed to thrive as a design verification engineer?

To thrive as a Design Verification Engineer, you need a solid background in digital design, verification methodologies, and programming languages like SystemVerilog, typically supported by a degree in electrical engineering or a related field. Familiarity with verification tools such as UVM, simulation environments, and EDA software is essential, along with knowledge of scripting languages like Python or Perl. Strong analytical thinking, attention to detail, and effective teamwork are standout soft skills in this role. These skills ensure accurate validation of complex hardware designs, reducing errors and supporting reliable product development cycles.

What are some common challenges faced by design verification engineers, and how can they be addressed?

Design Verification engineers often encounter challenges such as managing complex testbenches, debugging intricate corner cases, and ensuring coverage completeness within tight project timelines. To address these, it’s important to have strong scripting skills, collaborate closely with design and validation teams, and make effective use of verification methodologies like UVM. Regular communication and review cycles also help catch issues early and improve overall verification quality.
What are the most commonly searched types of Design Verification jobs in Austin, TX? The most popular types of Design Verification jobs in Austin, TX are:
What job categories do people searching Design Verification jobs in Austin, TX look for? The top searched job categories for Design Verification jobs in Austin, TX are:
What cities near Austin, TX are hiring for Design Verification jobs? Cities near Austin, TX with the most Design Verification job openings:
Infographic showing various Design Verification job openings in Austin, TX as of August 2026, with employment types broken down into 87% Full Time, 8% Part Time, and 5% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $147,839 per year, or $71.1 per hour.

ASIC Engineer, Design Verification

Meta

Austin, TX

$114K/yr

Full-time

Re-posted 8 days ago


Meta rating

7.8

Company rating: 7.8 out of 10

Based on 45 frontline employees who took The Breakroom Quiz

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Job description

Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer, you will be part of a team working with experienced engineers across the industry, focused on developing advanced ASIC solutions for Meta’s data center applications. You will be responsible for the verification closure of a design module or sub-system from test-planning, UVM based test bench development to verification closure. Along with traditional simulation, you will be using other approaches like Formal and Emulation to achieve a bug-free design. The role also provides ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design, Emulation and Post-Silicon teams towards creating a first-pass silicon success.
ASIC Engineer, Design Verification Responsibilities:
  • Define and implement block/IP/System on Chip (SoC) verification plans, build verification test benches to enable block/IP/sub-system/SoC level verification
  • Develop functional tests based on verification test plan
  • Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage
  • Debug, root-cause and resolve functional failures in the design, partnering with the Design team
  • Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring design quality through defined verification metrics and coverage goals

Minimum Qualifications:
  • Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta
  • 2+ years of hands-on experience in SystemVerilog/UVM methodology or C/C++ based verification
  • 2+ years experience in block/IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies
  • Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments

Preferred Qualifications:
  • Track record of 'first-pass success' in Application-Specific Integrated Circuit (ASIC) development cycles
  • Experience with revision control systems like Mercurial(Hg), Git or SVN
  • Experience in development of Universal Verification Methodology (UVM) based verification environments from scratch
  • Experience with IP or integration verification of high-speed interfaces like Peripheral Component Interconnect Express (PCIe), Double Data Rate (DDR), Ethernet
  • Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle
  • Experience with verification of Advanced RISC Machines/Reduced Instruction Set Computing Five (ARM/RISC-V) based sub-systems or System-on-Chip (SoCs)
  • Experience with Design verification of Data-center applications like Video, Artificial Intelligence/Machine Learning (AI/ML) and Networking designs

About Meta:
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.
Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.
Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@meta.com.
$114,000/year to $172,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.

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