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Design Verification Engineer Jobs in Tucson, AZ (NOW HIRING)

Design Verification Engineer

Tucson, AZ · On-site

$131K - $160K/yr

We are seeking a highly motivated and versatile engineer to join our dynamic Current Sensing ... Work closely with design and system teams to define Design for Verification (DFV) architectures ...

Design Verification Engineer

Tucson, AZ · On-site

$131K - $160K/yr

We are seeking a highly motivated and versatile engineer to join our dynamic Current Sensing ... Work closely with design and system teams to define Design for Verification (DFV) architectures ...

Digital Design Engineer

Tucson, AZ · On-site

$90K - $100K/yr

Verification, integration, and testing * Collaborate within a multi-disciplinary engineering team Core Technologies / Focus Areas * High-speed digital electronics * FPGA and configurable logic design

Digital Design Engineer

Tucson, AZ · On-site

$90K - $100K/yr

Verification, integration, and testing * Collaborate within a multi-disciplinary engineering team Core Technologies / Focus Areas * High-speed digital electronics * FPGA and configurable logic design

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Design Verification Engineer information

See Tucson, AZ salary details

$90.7K

$128.2K

$143.6K

How much do design verification engineer jobs pay per year?

As of Aug 22, 2026, the average yearly pay for design verification engineer in Tucson, AZ is $128,223.00, according to ZipRecruiter salary data. Most workers in this role earn between $116,900.00 and $142,700.00 per year, depending on experience, location, and employer.

What is a design verification engineer?

A Design Verification Engineer ensures that hardware designs function correctly by developing and executing test plans, writing verification code (often in SystemVerilog with UVM), and debugging design issues. They work closely with design and validation teams to confirm specifications are met before manufacturing. Their role is critical in preventing costly design flaws and ensuring high-quality semiconductor products.

What skills and qualifications are needed to be a design verification engineer?

Design Verification Engineers require a solid background in digital design concepts, computer engineering, and electrical engineering, usually supported by a relevant bachelor’s or master’s degree. Expertise with hardware description languages like Verilog or VHDL, simulation tools, and familiarity with Unix/Linux environments are typical technical requirements, with certifications in FPGA/ASIC design considered advantageous. Strong analytical thinking, problem-solving skills, teamwork, and effective communication help these engineers collaborate closely with design, validation, and development teams. These competencies are vital to ensuring design correctness, catching flaws early, and driving efficient, reliable hardware development.

What are the most common challenges faced by design verification engineers in their daily work?

Design Verification Engineers often face the challenge of thoroughly validating complex digital designs within tight project deadlines. Debugging intricate issues, dealing with evolving specifications, and ensuring complete coverage during simulation can require a great deal of attention to detail and persistence. Collaboration with designers, validation teams, and often cross-functional groups is critical to resolving ambiguities and preventing errors from reaching production. Adapting to new verification methodologies or tools is also common as technologies and standards advance. These challenges offer valuable learning opportunities and play a crucial role in producing robust, high-quality hardware products.

What are the most commonly searched types of Design Verification Engineer jobs in Tucson, AZ?

The most popular types of Design Verification Engineer jobs in Tucson, AZ are:

What are popular job titles related to Design Verification Engineer jobs in Tucson, AZ?

For Design Verification Engineer jobs in Tucson, AZ, the most frequently searched job titles are:

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The top searched job categories for Design Verification Engineer jobs in Tucson, AZ are:

What cities near Tucson, AZ are hiring for Design Verification Engineer jobs?

Cities near Tucson, AZ with the most Design Verification Engineer job openings:

Infographic showing various Design Verification Engineer job openings in Tucson, AZ as of August 2026, with employment types broken down into 86% Full Time, 9% Part Time, and 5% Contract. Highlights an 86% Physical, 4% Hybrid, and 10% Remote job distribution, with an average salary of $128,223 per year, or $61.6 per hour.

Design Verification Engineer

118-WW TMG MFG OPS

Tucson, AZ • On-site

$131K - $160K/yr

Full-time

This job post has expired today. Applications are no longer accepted.


Job description

Change the world. Love your job. We are seeking a highly motivated and versatile engineer to join our dynamic Current Sensing product line that develops cutting edge Shunt and Hall based mixed signal current sensing ICs. As a key member of our team, you will play a vital role in all phases of IC development, from architectural development, design, DV, tapeout and bring-up. This position offers a unique opportunity to develop expertise in both digital and mixed-signal domains. Job Responsibilities: Design & Implementation: Contribute to the full IC development lifecycle, including RTL design, synthesis, place and route, scan pattern generation, and timing analysis. Verification: Develop and implement robust, scalable verification methodologies for mixed-signal ICs, including testbench creation and automation using DMS and AMS stimulus and checkers. Test Development: Create comprehensive test plans, tests, and simulations at RTL and gate levels using SystemVerilog (SV), VHDL, and the UVM environments. Collaboration & Problem Solving: Work closely with design and system teams to define Design for Verification (DFV) architectures, triage and resolve bugs, and ensure first-pass silicon success. Coverage & Reporting: Drive verification coverage to meet defined goals, track progress, and communicate status, issues, and risks effectively. Continuous Improvement and Automation: Develop and contribute to the evolution of our DV strategy, tools, scripts and methodologies to improve quality, efficiency and automation. Minimum requirements: Atleast 2 years of relevant experience A thorough understanding of digital logic design Familiarity with the Verilog, System Verilog, VHDL language and simulators Ability to solve problems using a systematic approach Preferred qualifications: A good understanding of analog functionality and exposure to analog IC design methods. Understanding and knowledge of analog and digital design principles, including RTL, FSMs, GLS, timing, synchronization, and power domains, mixed-signal and digital verification flow and analog block modeling. Experience with timing verification using Gates+SDF, electrical PVT variation, and timing analysis across analog/digital boundaries Demonstrated strong analytical and problem solving skills Strong verbal and written communication skills Ability to work in teams and collaborate effectively with people in different functions Strong time management skills that enable on-time project delivery Demonstrated ability to build strong, influential relationships Ability to work effectively in a fast-paced and rapidly changing environment Ability to take the initiative and drive for results #J-18808-Ljbffr