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Ddr Memory Jobs (NOW HIRING)

CYNET SYSTEMS

Laboratory Technician (General) 1

Austin, TX · On-site

$25 - $29/hr

Build, configure, and validate DDR DIMM configurations across server systems. * Perform hardware bring-up, system setup, and component installation (CPU, memory, storage). * Debug and troubleshoot ...

Everpure

Hardware Engineer

Santa Clara, CA

$145K - $191K/yr

Lead sub-system validation and qualification by defining, executing, and automating comprehensive test plans across CPU, DDR memory, PCIe, and Ethernet interfaces to accelerate time-to-market.

NVIDIA Gruppe

Senior Memory System Engineer

Santa Clara, CA · On-site

$184 - $287.50/hr

Analyze future DDR/LPDDR/HBM technologies to determine optimum performance, power, function, and ... Define memory module, package, and PCB layouts appropriate to system workloads. * Debug and bring ...

New

Cohu

Senior FPGA Engineer

Norwood, MA · On-site

$146K - $188K/yr

High bandwidth DDR memory * Waveform generation and digitization * DSP implementation * Precision analog signal control and calibration Work activities involve: * FPGA design using AMD and Intel FPGA ...

Cowboy Space Corp.

FPGA Software Engineer

San Carlos, CA · On-site

$150 - $200/hr

You\'ll design and own RTL for sensor interfacing, high-throughput pixel capture into DDR via DMA, and memory-mapped register interfaces to embedded Linux running on ARM-based SoCs. This is active ...

New

Micron Technology

DMTS Design Engineer

San Jose, CA · On-site

$208K - $416K/yr

If you're excited about solving complex challenges in DDR and emerging memory technologies, you'll find strong impact and collaboration here! We are seeking an experienced Distinguished Member of ...

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Ddr Memory information

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$127.5K

$168.5K

How much do ddr memory jobs pay per year?

As of Aug 21, 2026, the average yearly pay for ddr memory in the United States is $166,304.00, according to ZipRecruiter salary data. Most workers in this role earn between $167,000.00 and $167,000.00 per year, depending on experience, location, and employer.

What is a DDR memory module?

DDR memory modules, or Double Data Rate memory, are a type of computer RAM that can transfer data on both the rising and falling edges of the clock signal, effectively doubling the data rate compared to previous single data rate memory. DDR memory is commonly used in desktops, laptops, and servers to provide fast and efficient temporary data storage that the processor can quickly access. Over time, several generations have been released, including DDR2, DDR3, DDR4, and DDR5, each offering improvements in speed, bandwidth, and power efficiency.

What are some common challenges faced by DDR memory engineers when working on new hardware designs?

DDR Memory Engineers often encounter challenges related to signal integrity, timing closure, and compatibility with evolving hardware platforms. Ensuring reliable high-speed data transmission and minimizing noise requires close collaboration with PCB designers and system architects. Additionally, adapting to rapidly changing memory standards and troubleshooting issues that arise during prototyping and testing are key aspects of the role. Effective communication and problem-solving skills are essential for resolving these challenges and delivering robust memory solutions.

What are the key skills and qualifications needed to thrive as a DDR memory engineer, and why are they important?

A DDR Memory Engineer typically needs a strong background in electrical or computer engineering, with expertise in digital logic, memory architectures, and signal integrity. Familiarity with tools like oscilloscopes, logic analyzers, simulation software (e.g., SPICE, Cadence), and industry standards such as JEDEC DDR specifications is required. Excellent problem-solving skills, attention to detail, and effective communication are crucial soft skills for collaborating across teams and troubleshooting complex issues. These competencies ensure reliable memory design, optimized performance, and successful integration in high-speed computing environments.

What is the difference between Ddr Memory vs Computer Hardware Technician?

AspectDdr MemoryComputer Hardware Technician
Required CredentialsKnowledge of memory modules, certifications like CompTIA A+Certifications like CompTIA A+, technical training in hardware repair
Work EnvironmentManufacturing, testing, or assembly of memory modulesRepair shops, IT departments, hardware troubleshooting
Industry UsageMemory manufacturing companies, electronics industryIT services, computer repair, technical support

While Ddr Memory involves the manufacturing and testing of memory modules, a Computer Hardware Technician focuses on diagnosing and repairing computer hardware, including memory components. Both roles require technical knowledge and certifications but differ in daily tasks and work environments.

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Ddr Memory jobs near you
Infographic showing various Ddr Memory job openings in the United States as of August 2026, with employment types broken down into 1% As Needed, 70% Full Time, 26% Part Time, and 3% Contract. Highlights an 93% Physical, 1% Hybrid, and 6% Remote job distribution, with an average salary of $166,304 per year, or $80 per hour.

Senior Staff Design Verification Engineer - Memory Sub-System

Marvell Technology, Inc.

Santa Clara, CA • On-site

$159K - $195K/yr

Full-time

Life, Retirement

Re-posted 15 days ago

Job description

About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
The Center of Excellence (COE), part of the Custom Compute and Storage (CCS) Business Unit within Marvell's Data Center Group, is chartered to define, develop, and maintain standard, production-ready IP subsystems - spanning PCIe/CXL, Ethernet, DDR/Memory, Security/Boot, Low-Speed IO, and other critical technologies - that customers and internal SoC teams can adopt with confidence.
By shifting left, the COE enables faster time-to-market, reduces integration risk, and ensures compliance, interoperability, and high performance across Marvell's SoC products. It embodies the "One Marvell" principle - sharing reusable components, verification environments, and knowledge across all business units to drive first-pass-right silicon.
As part of the COE, you will design, verify, and deliver IP subsystem building blocks powering Marvell's most advanced custom chips for hyperscale cloud, AI, and data center customers - working at the intersection of architecture, RTL design, verification, firmware/software, and silicon validation.
What You Can Expect
  • Develop and execute verification plans for high-speed memory interfaces (DDR4/DDR5, LPDDR4/LPDDR5, HBM2/HBM3)
  • Build and enhance UVM/System Verilog-based verification environments
  • Develop test benches, sequences, and checkers for functional and performance validation
  • Perform protocol-level verification for memory controllers and PHY interfaces
  • Analyze and debug simulation failures, identify root causes, and drive resolution
  • Work closely with design, architecture, and firmware teams to ensure coverage closure and spec compliance
  • Contribute to coverage-driven verification (CDV) including functional, code, and assertion coverage
  • Support emulation/FPGA validation and post-silicon bring-up (nice to have)

Review design specifications and provide feedback for testability and robustness
What We're Looking For
.Required Qualifications:
  • Bachelor's or master's degree in electrical engineering, Computer Engineering, or related field
  • 5-10 years of experience in ASIC/SoC verification
  • Strong knowledge of DDR, LPDDR, or HBM protocols and architecture
  • Expertise in System Verilog and UVM methodology
  • Experience with debugging complex verification issues
  • Familiarity with industry-standard tools (e.g., simulation, waveform debugging, coverage tools)
  • Solid understanding of digital design fundamentals

Preferred Qualifications:
  • Knowledge of JEDEC standards for DDR/LPDDR/HBM
  • Experience with assertion-based verification (SVA)
  • Exposure to performance modeling and traffic generation
  • Experience in emulation platforms (e.g., Palladium, Veloce)
  • Scripting skills (Python/Perl/Shell)
  • Experience with low-power verification (UPF/CPF)

Expected Base Pay Range (USD)
134,390 - 201,300, $ per annum
The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life's most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
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