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Cpu Rtl Design Engineer Jobs in Porter Ranch, CA

K2 Space

ASIC Design Verification Engineer

Los Angeles, CA · On-site

$130K - $200K/yr

You will help define the verification approach, contribute to methodology, and work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a ...

Apple

Wireless SOC FW Engineer

Los Angeles, CA · On-site

... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. In this highly visible role, you will be at the center of a silicon design group with a ...

Apple

Wireless SOC FW Engineer

Los Angeles, CA · On-site

... and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. Description In this highly visible role, you will be at the center of a ...

Apple

WSoC RF Test Automation Engineer

Los Angeles, CA · On-site

All of this is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration ...

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All JobsCpu Rtl Design Engineer JobsCpu Rtl Design Engineer Jobs in Porter Ranch, CA

Cpu Rtl Design Engineer information

See Porter Ranch, CA salary details

$41.6K

$90.5K

$162.7K

How much do cpu rtl design engineer jobs pay per year?

As of Jul 22, 2026, the average yearly pay for cpu rtl design engineer in Porter Ranch, CA is $90,476.00, according to ZipRecruiter salary data. Most workers in this role earn between $69,800.00 and $101,100.00 per year, depending on experience, location, and employer.

What is the difference between Cpu Rtl Design Engineer vs Cpu Verification Engineer?

AspectCpu Rtl Design EngineerCpu Verification Engineer
Primary FocusDesigning and developing RTL code for CPU componentsVerifying and testing RTL designs for correctness
Skills & CertificationsHDL languages (Verilog/VHDL), FPGA/ASIC design experienceHDL, testbench development, simulation tools
Work EnvironmentDesign teams, hardware development labsVerification teams, simulation environments
Industry UsageSemiconductor companies, CPU design firmsASIC/FPGA verification, chip validation

While both roles require HDL knowledge and work within hardware design environments, Cpu Rtl Design Engineers focus on creating the RTL code for CPU components, whereas Cpu Verification Engineers concentrate on testing and validating those designs to ensure functionality and performance.

What are some common challenges faced by CPU RTL Design Engineers when collaborating with verification and architecture teams?

CPU RTL Design Engineers often work closely with both verification and architecture teams to ensure that the design meets functional and performance requirements. A common challenge is ensuring clear communication of design intent and handling feedback from verification regarding corner cases or bugs. Balancing architectural changes with design timelines and maintaining synchronization across multiple teams can be demanding. Successful engineers proactively document their work, participate in regular sync-ups, and are open to iterative improvements based on collaborative feedback.

What are the key skills and qualifications needed to thrive as a CPU RTL Design Engineer, and why are they important?

To thrive as a CPU RTL Design Engineer, you need a strong background in digital logic design, computer architecture, and proficiency in hardware description languages like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys or Cadence, and experience with simulation, synthesis, and verification methodologies are essential. Strong problem-solving skills, attention to detail, and effective teamwork are crucial soft skills for success in this role. These competencies enable the accurate implementation, debugging, and optimization of complex CPU designs, ensuring performance and reliability in final hardware products.

What are CPU RTL Design Engineers?

CPU RTL (Register Transfer Level) Design Engineers are specialized hardware engineers who design, implement, and verify the digital logic that forms the core of computer processors. They use hardware description languages like Verilog or VHDL to create and simulate the functional blocks of CPUs, ensuring correct operation and optimal performance. Their work involves close collaboration with architecture, verification, and physical design teams to bring processor designs from conception to silicon. They also debug and optimize designs to meet power, speed, and area goals.
What are popular job titles related to Cpu Rtl Design Engineer jobs in Porter Ranch, CA? For Cpu Rtl Design Engineer jobs in Porter Ranch, CA, the most frequently searched job titles are:
What cities near Porter Ranch, CA are hiring for Cpu Rtl Design Engineer jobs? Cities near Porter Ranch, CA with the most Cpu Rtl Design Engineer job openings:
Cpu Rtl Design Engineer jobs near you
Infographic showing various Cpu Rtl Design Engineer job openings in Porter Ranch, CA as of July 2026, with employment types broken down into 83% Full Time, and 17% Contract. Highlights an 100% In-person job distribution, with an average salary of $90,476 per year, or $43.5 per hour.
Senior FPGA / RTL Design Engineer - Signal Processing

Senior FPGA / RTL Design Engineer - Signal Processing

Motorola Solutions, Inc.

Los Angeles, CA • On-site

$125K - $195K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Posted 21 days ago

Motorola Solutions rating

8.7

Company rating: 8.7 out of 10

Based on 40 frontline employees who took The Breakroom Quiz

14th of 144 rated electronics manufacturers

Job description

Company Overview
At Motorola Solutions, we believe that everything starts with our people. We're a global close-knit community, united by the relentless pursuit to help keep people safer everywhere. We build and connect technologies to help protect people, property and places. Our solutions foster the collaboration that's critical for safer communities, safer schools, safer hospitals, safer businesses, and ultimately, safer nations. Connect with a career that matters, and help us build a safer future.
Department Overview
Silvus Technologies, a leading provider of advanced MANET and MIMO communications systems, is reshaping mesh network technology for mission-critical applications - on the ground, in the air and at sea. Its battle-proven StreamCaster family of MANET radios and proprietary MN-MIMO waveform provides the vital communications link for defense, law enforcement and public safety agencies around the world, and in the toughest operational environments.
With deep roots in DARPA research, Silvus Technologies develops world-class advanced communications technologies that are reshaping the tactical communications landscape. From pure line-of-sight to extreme non-line-of-sight, Silvus radios form a self-healing, self-forming mesh network, enabling secure and reliable connectivity, including video and high-bandwidth data
Silvus Technologies is a wholly owned subsidiary of Motorola Solutions, Inc.
Job Description
Would you like to join an incredibly talented group of people, doing very challenging work, with the prime directive of "Keeping Our Heroes Connected"?
THE OPPORTUNITY
Silvus is seeking a Senior FPGA Design Engineer- Signal Processing reporting to the Director of FPGA Engineering on the FPGA Engineering team. The successful individual in this role will participate in all aspects of the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal processing algorithms for Silvus' MIMO wireless networking products. In addition, they participate in the support and development of FPGA-based designs for our advanced wireless systems R&D. These are exciting projects targeted to address challenging real-world communication needs.
This position is based at Silvus Technologies' headquarters in the heart of vibrant West Los Angeles, CA, and is on a hybrid schedule. A minimum of 3 days onsite per week is expected. On-site days are Mondays, Wednesdays, and Thursdays.
The following is a list of at least some of the current essential job functions of the position. Management may assign or reassign duties and responsibilities at any time at its discretion.
ROLE AND RESPONSIBILITIES
  • Digital design architecting for wireless communication projects.
  • Fixed point design of signal processing blocks while working with systems engineers.
  • RTL coding, simulation, and test bench development.
  • FPGA synthesis and timing closure.
  • Hardware verification and troubleshooting; familiarity with logic analyzers.
  • Provide support to the RF and Software Engineering teams.
  • Perform other related duties of which the above are representative.

REQUIRED QUALIFICATIONS
  • Bachelor of Science degree in Electrical Engineering, Computer Science, or related fields.
  • Minimum 6 years of demonstrated experience in FPGA design; OR 4 years of FPGA design experience with a Master of Science degree; OR 2 years of FPGA design experience with a PhD degree.
  • Demonstrated experience with fixed point binary arithmetic and digital signal processing designs.
  • Proven expertise working with multiple clock-domain, high-utilization FPGA designs.
  • Experience with Xilinx FPGAs, SoCs, and the Vivado IDE.
  • Must be U.S. Person (U.S. Citizen, or Permanent Resident) due to clients under U.S. federal contracts.
  • All employment is contingent upon the successful clearance of a background check and drug test.

PREFERRED KNOWLEDGE, SKILLS, AND ABILITIES
  • Master of Science degree in Electrical Engineering (MSEE).
  • Experience using MATLAB.
  • Experience with communication systems on FPGA or ASIC designs.

WORKING CONDITIONS AND PHYSICAL REQUIREMENTS
  • Office environment.
  • Occasional exposure to heat, cold, and allergens while performing tests or demonstrations in the field.
  • While performing the duties of this job, the employee is required to do the following:
    • Lift equipment up to 20 lbs. for the set-up of demonstrations and testing.
    • Perform bending and reaching movements to place items on lower and higher shelves.
    • Kneeling or squatting to access lower shelves.
    • Walking/Moving in the labs.

#silvuscareers
COMPENSATION: $125,000 - $195,000 / annually
The pay range is NOT a guarantee. It is based on market research and peer data and will vary depending on the candidate's experience and qualifications.
NOTE - As a US Federal Contractor, Silvus Technologies requires that ALL candidates being considered for employment for any position (regardless of level) MUST be a U.S. Person (permanent resident or citizen). Stricter U.S. Citizen ONLY requirements (needed for some Engineering or R&D roles) will be included in the Required Qualifications section of the posted position. This does NOT apply to international positions; only job postings for positions located in the US.
All employment is contingent upon the successful clearance of a background check and drug test.
Basic Requirements
  • Bachelor of Science degree in Electrical Engineering, Computer Science, or related fields.
  • Minimum 6 years of demonstrated experience in FPGA design; OR 4 years of FPGA design experience with a Master of Science degree; OR 2 years of FPGA design experience with a PhD degree.
  • Demonstrated experience with fixed point binary arithmetic and digital signal processing designs.
  • Proven expertise working with multiple clock-domain, high-utilization FPGA designs.
  • Experience with Xilinx FPGAs, SoCs, and the Vivado IDE.
  • Must be U.S. Person (U.S. Citizen, or Permanent Resident) due to clients under U.S. federal contracts.
  • All employment is contingent upon the successful clearance of a background check and drug test.

Travel Requirements
Under 10%
Relocation Provided
Domestic
Position Type
Experienced
Referral Payment Plan
Yes
Our U.S. Benefits include:
  • Incentive Bonus Plans
  • Medical, Dental, Vision benefits
  • 401K with Company Match
  • 10 Paid Holidays
  • Generous Paid Time Off Packages
  • Employee Stock Purchase Plan
  • Paid Parental & Family Leave
  • and more!

EEO Statement
Motorola Solutions is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion or belief, sex, sexual orientation, gender identity, national origin, disability, veteran status or any other legally-protected characteristic.
We are proud of our people-first and community-focused culture, empowering every Motorolan to be their most authentic self and to do their best work to deliver on the promise of a safer world. If you'd like to join our team but feel that you don't quite meet all of the preferred skills, we'd still love to hear why you think you'd be a great addition to our team.
We're committed to providing an inclusive and accessible recruiting experience for candidates with disabilities, or other physical or mental health conditions. To request an accommodation, please complete this Reasonable Accommodations Form so we can assist you.

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About Motorola Solutions

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At Motorola Solutions, we believe that everything starts with safety. It's the constant that empowers people to confidently move forward. It can fill a flight or sell out a stadium. It can care for a patient or graduate a class. As a global leader in public safety and enterprise security, we create and connect the technologies that help to keep people safe where they live, learn, work and play. Our integrated technology ecosystem unifies critical communications, video security and access control, and command center software, enabling collaboration in more powerful ways. At Motorola Solutions, we're ushering in a new era in public safety and security. Bring your passion, potential and talents to a career that matters.

Industry

Technology, communication and media

Company size

10,000+ Employees

Headquarters location

Chicago, IL, US

Year founded

1928

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