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Cpu Rtl Design Engineer Jobs in Phoenix, AZ (NOW HIRING)

Intel

CPU Formal Verification Engineer

Phoenix, AZ · On-site

$164K - $311K/yr

Working as part of the CPU team, you will leverage formal verification methodologies to develop ... Collaborate with architects, RTL developers, and physical design teams to enhance verification ...

Intel

Mixed Signal Logic Design Engineer

Phoenix, AZ

As a Mixed Signal Logic Design Engineer, you will play a pivotal role in shaping the future of high ... Implement specifications/designs in RTL and coordinate the work of other junior designers to ...

Intel

Mixed Signal Logic Design Engineer

Phoenix, AZ

As a Mixed Signal Logic Design Engineer, you will play a pivotal role in shaping the future of high ... Implement specifications/designs in RTL and coordinate the work of other junior designers to ...

Viasat, Inc.

FPGA Engineer (Space)

Tempe, AZ · On-site

$164K - $246K/yr

Own the architecture, design, and implementation of FPGA based digital systems * Develop RTL in ... Bachelor Degree in Electrical Engineering, Computer Engineering or a related field * 6+ years FPGA ...

Viasat, Inc.

FPGA Engineer (Space)

Tempe, AZ · On-site

$164K - $246K/yr

Own the architecture, design, and implementation of FPGA based digital systems * Develop RTL in ... Bachelor Degree in Electrical Engineering, Computer Engineering or a related field * 6+ years FPGA ...

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All JobsCpu Rtl Design Engineer JobsCpu Rtl Design Engineer Jobs in Phoenix, AZ

Cpu Rtl Design Engineer information

See Phoenix, AZ salary details

$38.4K

$83.6K

$150.3K

How much do cpu rtl design engineer jobs pay per year?

As of Jul 9, 2026, the average yearly pay for cpu rtl design engineer in Phoenix, AZ is $83,615.00, according to ZipRecruiter salary data. Most workers in this role earn between $64,500.00 and $93,400.00 per year, depending on experience, location, and employer.

What is the difference between Cpu Rtl Design Engineer vs Cpu Verification Engineer?

AspectCpu Rtl Design EngineerCpu Verification Engineer
Primary FocusDesigning and developing RTL code for CPU componentsVerifying and testing RTL designs for correctness
Skills & CertificationsHDL languages (Verilog/VHDL), FPGA/ASIC design experienceHDL, testbench development, simulation tools
Work EnvironmentDesign teams, hardware development labsVerification teams, simulation environments
Industry UsageSemiconductor companies, CPU design firmsASIC/FPGA verification, chip validation

While both roles require HDL knowledge and work within hardware design environments, Cpu Rtl Design Engineers focus on creating the RTL code for CPU components, whereas Cpu Verification Engineers concentrate on testing and validating those designs to ensure functionality and performance.

What are some common challenges faced by CPU RTL Design Engineers when collaborating with verification and architecture teams?

CPU RTL Design Engineers often work closely with both verification and architecture teams to ensure that the design meets functional and performance requirements. A common challenge is ensuring clear communication of design intent and handling feedback from verification regarding corner cases or bugs. Balancing architectural changes with design timelines and maintaining synchronization across multiple teams can be demanding. Successful engineers proactively document their work, participate in regular sync-ups, and are open to iterative improvements based on collaborative feedback.

What are the key skills and qualifications needed to thrive as a CPU RTL Design Engineer, and why are they important?

To thrive as a CPU RTL Design Engineer, you need a strong background in digital logic design, computer architecture, and proficiency in hardware description languages like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys or Cadence, and experience with simulation, synthesis, and verification methodologies are essential. Strong problem-solving skills, attention to detail, and effective teamwork are crucial soft skills for success in this role. These competencies enable the accurate implementation, debugging, and optimization of complex CPU designs, ensuring performance and reliability in final hardware products.

What are CPU RTL Design Engineers?

CPU RTL (Register Transfer Level) Design Engineers are specialized hardware engineers who design, implement, and verify the digital logic that forms the core of computer processors. They use hardware description languages like Verilog or VHDL to create and simulate the functional blocks of CPUs, ensuring correct operation and optimal performance. Their work involves close collaboration with architecture, verification, and physical design teams to bring processor designs from conception to silicon. They also debug and optimize designs to meet power, speed, and area goals.
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What job categories do people searching Cpu Rtl Design Engineer jobs in Phoenix, AZ look for? The top searched job categories for Cpu Rtl Design Engineer jobs in Phoenix, AZ are:
Cpu Rtl Design Engineer jobs near you

Senior Digital Design Engineer

NXP Semiconductors

Chandler, AZ

$133K/yr

Full-time

Posted 16 hours ago

Job description

Job Responsibility:

As a digital designer, you will join a highly experienced team. Your key responsibilities will be:

  • Thoroughly understand various Standards and specifications regarding USB2, eUSB2, typeC, USBPD, TCPCI, BC1.2, I2C, SPI, SPMI; and map that knowledge to the needs of SoC product under design. Micro-architect the features and implementation details of the design IP. Prior knowledge and experience on the above listed specifications is a strong plus for this role.

  • Develop and implement digital IP and logic designs for complex Mixed-Signal System-on-Chips (SoCs), adhering to architectural specifications and performance requirements. (Verilog/SystemVerilog).

  • Complete high-quality, area-optimal, low-power RTL design using industry-standard hardware description languages

  • Conduct IP-level design verification activities, including testbench development, simulation, and debugging, to ensure functional correctness and coverage.

  • Collaborate with architects, analog designers, test/product/quality/bench engineers and software team to define features, interfaces and integrate digital blocks.

  • Participate in synthesis, static timing analysis (STA), and formal verification to meet timing, area, and power targets.

  • Contribute to design for testability (DFT) implementation and verification.

  • Generate comprehensive design documentation and participate in design reviews.

  • Troubleshoot and resolve design issues throughout the development lifecycle.

  • Stay updated with the latest industry trends, tools, and methodologies in digital design.

Job Qualification:

  • Master's degree (MSEE) with majority of courses relevant to Digital Design, RTL coding, FPGA, Computer Architecture, Digital Verification.

  • Minimum 3 years of experience in similar role of Digital Design & Architecture. Seeking 3-8 years total experience for this role

  • Willing to relocate to Phoenix Metro area (Arizona) and minimum 3 days per week full-day presence in NXP's Chandler office

  • Excellent on problem-solving, teamwork, planning, organizing, attention to detail and communication skills.

More information about NXP in the United States...

NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.

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