CPU RTL Design Engineer
$141K - $269K/yr
As a CPU Logic Design Engineer, you will play a critical role in designing and optimizing the logic for Intel's cutting-edge processors. You will drive the development of register transfer level (RTL ...
$141K - $269K/yr
As a CPU Logic Design Engineer, you will play a critical role in designing and optimizing the logic for Intel's cutting-edge processors. You will drive the development of register transfer level (RTL ...
$141K - $269K/yr
As a CPU Logic Design Engineer, you will play a critical role in designing and optimizing the logic for Intel's cutting-edge processors. You will drive the development of register transfer level (RTL ...
$164K - $269K/yr
As a Senior CPU RTL Design Engineer - Power Management , you will play a critical role in designing and delivering CPU microarchitectures with strong emphasis on power management and energy-efficient ...
$164K - $269K/yr
As a Senior CPU RTL Design Engineer - Power Management , you will play a critical role in designing and delivering CPU microarchitectures with strong emphasis on power management and energy-efficient ...
Chandler, AZ · On-site
$127K - $203K/yr
Broadcom's Central Engineering Group is seeking a candidate to lead the digital design and ... Design convergence to timing closure utilizing RTL optimization strategies. * Conduct formal ...
Chandler, AZ · On-site
$127K - $203K/yr
Broadcom's Central Engineering Group is seeking a candidate to lead the digital design and ... Design convergence to timing closure utilizing RTL optimization strategies. * Conduct formal ...
$127K - $203K/yr
Broadcom's Central Engineering Group is seeking a candidate to lead the digital design and ... Design convergence to timing closure utilizing RTL optimization strategies. * Conduct formal ...
$127K - $203K/yr
Broadcom's Central Engineering Group is seeking a candidate to lead the digital design and ... Design convergence to timing closure utilizing RTL optimization strategies. * Conduct formal ...
$121K - $167K/yr
As part of our team, you will help design the next generation of high-performance microprocessors ... As a Sr. CPU RTL Methodology Engineer your responsibilities will include but are not limited to:
$121K - $167K/yr
As part of our team, you will help design the next generation of high-performance microprocessors ... As a Sr. CPU RTL Methodology Engineer your responsibilities will include but are not limited to:
Phoenix, AZ · On-site
$135K - $164K/yr
What You'll Do As a Senior CPU Design Verification Engineer you will play a critical role in ... Debug and rootcause complex RTL, microarchitecture, and integration issues; drive issues to ...
Phoenix, AZ · On-site
$135K - $164K/yr
What You'll Do As a Senior CPU Design Verification Engineer you will play a critical role in ... Debug and rootcause complex RTL, microarchitecture, and integration issues; drive issues to ...
Chandler, AZ · On-site +1
$200K - $250K/yr
Head of Engineering About Us PowerLattice is a well-funded semiconductor start-up company backed by ... Actively contribute to RTL development for key components * Drive design tradeoffs across ...
Chandler, AZ · On-site +1
$200K - $250K/yr
Head of Engineering About Us PowerLattice is a well-funded semiconductor start-up company backed by ... Actively contribute to RTL development for key components * Drive design tradeoffs across ...
Chandler, AZ · On-site
$133K/yr
Develop RTL designs using Verilog and support integration into larger SoC environments. * Design ... Degree in Electrical Engineering, Computer Engineering, or a related technical field. * Bachelor ...
Chandler, AZ · On-site
$133K/yr
Develop RTL designs using Verilog and support integration into larger SoC environments. * Design ... Degree in Electrical Engineering, Computer Engineering, or a related technical field. * Bachelor ...
Chandler, AZ · On-site
$133K/yr
Develop RTL designs using Verilog and support integration into larger SoC environments. * Design ... Degree in Electrical Engineering, Computer Engineering, or a related technical field. * Bachelor ...
Chandler, AZ · On-site
$133K/yr
Develop RTL designs using Verilog and support integration into larger SoC environments. * Design ... Degree in Electrical Engineering, Computer Engineering, or a related technical field. * Bachelor ...
Chandler, AZ · On-site
$133K/yr
Develop RTL designs using Verilog and support integration into larger SoC environments. * Design ... Degree in Electrical Engineering, Computer Engineering, or a related technical field. * Bachelor ...
Chandler, AZ · On-site
$133K/yr
Develop RTL designs using Verilog and support integration into larger SoC environments. * Design ... Degree in Electrical Engineering, Computer Engineering, or a related technical field. * Bachelor ...
Chandler, AZ · On-site
$133K/yr
Develop RTL designs using Verilog and support integration into larger SoC environments. * Design ... Degree in Electrical Engineering, Computer Engineering, or a related technical field. * Bachelor ...
Chandler, AZ · On-site
$133K/yr
Develop RTL designs using Verilog and support integration into larger SoC environments. * Design ... Degree in Electrical Engineering, Computer Engineering, or a related technical field. * Bachelor ...
Chandler, AZ · On-site
$198K/yr
As a Principal Digital Design Engineer, you will lead the architecture and implementation of ... Lead RTL design, coding, and optimization in Verilog/SystemVerilog for performance, area, and power ...
Chandler, AZ · On-site
$198K/yr
As a Principal Digital Design Engineer, you will lead the architecture and implementation of ... Lead RTL design, coding, and optimization in Verilog/SystemVerilog for performance, area, and power ...
As a Staff Digital Design Engineer, you will develop complex digital subsystems within ADI's mixed ... Execute RTL design, coding, and optimization in Verilog/SystemVerilog for performance, area, and ...
As a Staff Digital Design Engineer, you will develop complex digital subsystems within ADI's mixed ... Execute RTL design, coding, and optimization in Verilog/SystemVerilog for performance, area, and ...
As a Staff Digital Design Engineer, you will develop complex digital subsystems within ADI's mixed ... Execute RTL design, coding, and optimization in Verilog/SystemVerilog for performance, area, and ...
As a Staff Digital Design Engineer, you will develop complex digital subsystems within ADI's mixed ... Execute RTL design, coding, and optimization in Verilog/SystemVerilog for performance, area, and ...
Chandler, AZ · On-site
... engineering team and lead development of digital IP and SoC-level integration for mixed-signal ... This is a hands-on role spanning RTL design, integration, and signoff verification-with broad cross ...
Chandler, AZ · On-site
... engineering team and lead development of digital IP and SoC-level integration for mixed-signal ... This is a hands-on role spanning RTL design, integration, and signoff verification-with broad cross ...
Chandler, AZ · On-site
... engineering team and lead development of digital IP and SoC-level integration for mixed-signal ... This is a hands-on role spanning RTL design, integration, and signoff verification-with broad cross ...
Chandler, AZ · On-site
... engineering team and lead development of digital IP and SoC-level integration for mixed-signal ... This is a hands-on role spanning RTL design, integration, and signoff verification-with broad cross ...
Phoenix, AZ · On-site
$165K/yr
Collaborates with architects, design, verification, and validation engineers during the execution ... Participates in the debug and fixing of performance miscorrelation between RTL and\or silicon ...
Phoenix, AZ · On-site
$165K/yr
Collaborates with architects, design, verification, and validation engineers during the execution ... Participates in the debug and fixing of performance miscorrelation between RTL and\or silicon ...
As a Principal Digital Design Engineer, the candidate shall be working with multi-sited global Silicon Development Team in the areas of RTL design, design verification, synthesis, STA, and Test using ...
As a Principal Digital Design Engineer, the candidate shall be working with multi-sited global Silicon Development Team in the areas of RTL design, design verification, synthesis, STA, and Test using ...
As a Principal Digital Design Engineer, the candidate shall be working with multi-sited global Silicon Development Team in the areas of RTL design, design verification, synthesis, STA, and Test using ...
As a Principal Digital Design Engineer, the candidate shall be working with multi-sited global Silicon Development Team in the areas of RTL design, design verification, synthesis, STA, and Test using ...
As a Principal Digital Design Engineer, you will lead the architecture and implementation of ... Lead RTL design, coding, and optimization in Verilog/SystemVerilog for performance, area, and power ...
As a Principal Digital Design Engineer, you will lead the architecture and implementation of ... Lead RTL design, coding, and optimization in Verilog/SystemVerilog for performance, area, and power ...
$38.4K - $48.6K
2% of jobs
$48.6K - $58.8K
11% of jobs
$64.2K is the 25th percentile. Wages below this are outliers.
$58.8K - $68.9K
23% of jobs
The median wage is $75.5K / yr.
$68.9K - $79.1K
22% of jobs
$79.1K - $89.3K
17% of jobs
$89.6K is the 75th percentile. Wages above this are outliers.
$89.3K - $99.5K
9% of jobs
$99.5K - $109.6K
6% of jobs
$109.6K - $119.8K
3% of jobs
$119.8K - $130K
3% of jobs
$130K - $140.2K
2% of jobs
$140.2K - $150.3K
1% of jobs
$38.4K
$83.6K
$150.3K
| Aspect | Cpu Rtl Design Engineer | Cpu Verification Engineer |
|---|---|---|
| Primary Focus | Designing and developing RTL code for CPU components | Verifying and testing RTL designs for correctness |
| Skills & Certifications | HDL languages (Verilog/VHDL), FPGA/ASIC design experience | HDL, testbench development, simulation tools |
| Work Environment | Design teams, hardware development labs | Verification teams, simulation environments |
| Industry Usage | Semiconductor companies, CPU design firms | ASIC/FPGA verification, chip validation |
While both roles require HDL knowledge and work within hardware design environments, Cpu Rtl Design Engineers focus on creating the RTL code for CPU components, whereas Cpu Verification Engineers concentrate on testing and validating those designs to ensure functionality and performance.
$141K - $269K/yr
Full-time
Medical, Retirement, PTO
Posted 20 days ago
8.7
Based on 145 frontline employees who took The Breakroom Quiz
10th of 141 rated electronics manufacturers
Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and has a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow.
The Role and Impact:
As a CPU Logic Design Engineer, you will play a critical role in designing and optimizing the logic for Intel's cutting-edge processors. You will drive the development of register transfer level (RTL) code and simulation for the CPU, enabling creation of cell libraries, functional units, and CPU IP blocks for integration into full-chip designs. Your expertise will be pivotal in defining architecture and microarchitecture features, ensuring Intel continues to deliver innovative solutions that lead the industry in performance, energy efficiency, and design integrity. By contributing to the development and optimization of logic structures, you will help create technology that enriches the lives of every person on Earth, while enabling Intel to achieve its broader mission of engineering a brighter future.
Key Responsibilities:
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences.
Minimum Qualifications:
Bachelor's degree in electrical engineering, computer engineering, or computer science with 7+ years of relevant experience; OR Master's degree with 5+ years of experience; OR PhD with 2+ years of experience.
Preferred Qualifications:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.Sourced by ZipRecruiter
Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth
Manufacturing
10,000+ Employees
Santa Clara, CA, US
1968