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Contract Mask Layout Design Engineer Jobs in Phoenix, AZ

Staff Analog Design Engineer

Chandler, AZ · On-site

$198K/yr

Lead or support layout implementation, post-layout simulation, and performance optimization ... Engineering, or related field: * Bachelor's with 7+ years of relevant IC design experience.

Senior Analog Design Engineer

Chandler, AZ · On-site

$198K/yr

Lead or support layout implementation, post-layout simulation, and performance optimization ... Engineering, or related field: * Bachelor's with 5+ years of relevant IC design experience.

I/O Design Engineer

Chandler, AZ · On-site

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

Work closely with layout teams to oversee physical design and verification. * Build Verilog ... MS or PhD in Electrical Engineering. * 6+ years of I/O or analog circuit design experience. * Deep ...

New

Senior Electrical Engineer II, Robotics

Scottsdale, AZ · On-site

$108K - $141K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

Lead schematic and layout design inspections to improve the quality of design releases and product ... Bachelor's degree in Electrical Engineering or similar engineering discipline * 9+ years of ...

Senior/Staff Hardware Design Engineer

Chandler, AZ · On-site

$150K - $200K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

Provide PCB layout guidance and collaborate closely with PCB layout engineers to ensure design intent is met. * Collaborate with PI/SI engineer to ensure the proper PDN performance. * Participate in ...

RTL Design Engineer

Chandler, AZ · On-site

$127K - $203K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

Broadcom's Central Engineering Group is seeking a candidate to lead the digital design and ... Familiar with Cadence Schematic/Layout, SPICE/Spectre circuit simulation. * Experience with ...

RTL Design Engineer

Chandler, AZ · On-site

$127K - $203K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

Broadcom's Central Engineering Group is seeking a candidate to lead the digital design and ... Familiar with Cadence Schematic/Layout, SPICE/Spectre circuit simulation. * Experience with ...

Senior Electrical Engineer II, Robotics

Scottsdale, AZ · On-site

$108K - $141K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

Additionally, as an electrical engineering expert designing world-class products, your strong ... Lead schematic and layout design inspections to improve the quality of design releases and product ...

Electrical Design Engineer

Tempe, AZ

$80K - $110K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

We are currently seeking an experienced Electrical Design Engineer to join our Tempe, Arizona ... Minimum of five (5) years of experience producing EI&C Contract Drawing packages in AutoCAD.

Digital Design Engineer

Chandler, AZ · On-site

$133K/yr

... layout, and test teams to deliver robust, manufacturable designs. Responsibilities: * Design and ... Degree in Electrical Engineering, Computer Engineering, or a related technical field. * Bachelor ...

Electrical Design Engineer

Tempe, AZ · On-site

$80K - $110K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Electrical Design Engineer Department: Electrical/Energy Employment Type: Full Time Location: Tempe ... Minimum of five (5) years of experience producing EI&C Contract Drawing packages in AutoCAD.

Electrical Design Engineer II

Phoenix, AZ · On-site

$107K - $149K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Interpret systems engineering and quality requirements as they apply to electrical product ... Proficiency using CAD layout tools to craft sophisticated printed circuit boards; and experience ...

Sr. Electrical Design Engineer

Phoenix, AZ · On-site

$135K - $155K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Design Engineering Manager Work Schedule: Onsite - Phoenix, AZ MOOG Space and Defense Group is a ... Proficiency with schematic capture and PCB layout tools (e.g., Cadence Allegro, Altium)

Showing results 41-60

Contract Mask Layout Design Engineer information

See Phoenix, AZ salary details

$44.7K

$120K

$184.2K

How much do contract mask layout design engineer jobs pay per year?

As of Aug 13, 2026, the average yearly pay for contract mask layout design engineer in Phoenix, AZ is $119,992.00, according to ZipRecruiter salary data. Most workers in this role earn between $89,400.00 and $143,000.00 per year, depending on experience, location, and employer.

What is the difference between Contract Mask Layout Design Engineer vs Mask Layout Design Engineer?

AspectContract Mask Layout Design EngineerMask Layout Design Engineer
CredentialsBachelor's or Master's in Electrical Engineering or related field; experience with mask design toolsSame as Contract Mask Layout Design Engineer
Work EnvironmentTypically contract-based, project-specific, often freelance or consulting rolesFull-time or in-house positions within semiconductor companies
Industry UsageUsed in industries requiring flexible, project-based mask design services

The main difference is that Contract Mask Layout Design Engineers work on a temporary, project basis, often with multiple clients, while Mask Layout Design Engineers are usually employed full-time within a company. Both roles require similar skills and credentials, but their work arrangements and employment types differ.

What are popular job titles related to Contract Mask Layout Design Engineer jobs in Phoenix, AZ?

For Contract Mask Layout Design Engineer jobs in Phoenix, AZ, the most frequently searched job titles are:

What job categories do people searching Contract Mask Layout Design Engineer jobs in Phoenix, AZ look for?

The top searched job categories for Contract Mask Layout Design Engineer jobs in Phoenix, AZ are:

Infographic showing various Contract Mask Layout Design Engineer job openings in Phoenix, AZ as of August 2026, with employment types broken down into 76% Full Time, 6% Part Time, 6% Temporary, and 12% Contract. Highlights an 100% In-person job distribution, with an average salary of $119,992 per year, or $57.7 per hour.

Staff Analog Design Engineer

Cirrus Logic

Chandler, AZ • On-site

$198K/yr

Full-time

Re-posted 7 days ago


Job description

For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for its award-winning culture, which was built on a foundation of inclusion and fairness, meaningful community engagement, and delivering enjoyable employee experiences at every turn. But we couldn't do it without our extraordinary workforce - and that's where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career!
We are seeking a highly motivated Analog Design Engineer to join a collaborative hardware design team developing high performance analog and mixed signal integrated circuits for advanced consumer and embedded applications. In this role, you will contribute to the design of next generation ICs spanning data converters, power management, amplifiers, and common analog infrastructure implemented in advanced CMOS processes.
You will participate in the full IC development lifecycle, from concept and architecture through silicon validation and production, while working closely with cross functional teams to deliver robust, manufacturable solutions that integrate easily into customer systems.
Responsibilities:
  • Design and develop analog and mixed-signal IC blocks from concept through production, including data converters, power management, amplifiers, and supporting circuitry in advanced CMOS processes.
  • Define architectures, perform transistor-level design, and create behavioral and system models using tools such as Matlab, Verilog-A, SystemVerilog, and Simulink.
  • Simulate and verify circuit and chip-level performance using Spectre and mixed-signal methodologies (analog-on-top, digital-on-top).
  • Lead or support layout implementation, post-layout simulation, and performance optimization, ensuring DRC/LVS closure.
  • Perform silicon bring-up, lab validation, debug, and post-silicon characterization using standard lab instrumentation.
  • Collaborate with cross-functional teams including digital, layout, test, and systems engineering to ensure robust, manufacturable designs.
  • Support product validation, characterization, and production test development through debug, analysis, and silicon learning.
  • Contribute to design reviews, technical documentation, and reusable analog infrastructure or platforms.

Required Knowledge, Skills, and Experience:
  • Degree in Electrical Engineering, Computer Engineering, or related field:
    • Bachelor's with 7+ years of relevant IC design experience.
    • Master's with 5+ years of relevant IC design experience.
    • PhD with 3+ years of relevant IC design experience.
  • Strong foundation in CMOS analog and mixed-signal IC design.
  • Deep understanding of the analog design flow: architecture, design, integration, verification, and silicon validation.
  • Proficiency with analog modeling and simulation tools (e.g., Matlab, Spectre, Verilog-A, SystemVerilog).
  • Solid understanding of device physics, noise analysis, stability, and control theory.
  • Hands-on lab experience with silicon debug and validation.
  • Strong analytical, problem-solving, and communication skills.
  • Organized, detail-oriented, and comfortable working in a fast-paced, collaborative environment.

Preferred Knowledge, Skills, and Experience:
  • Experience with:
    • Power conversion architectures (inductive and/or capacitive)
    • Delta-sigma ADCs/DACs and discrete-time or continuous-time signal processing
    • Switched-capacitor circuits, PLLs, LNAs, and audio-oriented analog blocks
    • System and behavioral modeling
  • Familiarity with reliability topics (ESD, latch-up, long-term device stress).
  • Experience across multiple CMOS process nodes and geometry scales.
  • Ability to plan, lead, and review analog subsystem designs.

#LI-Hybrid
#LI-TM1
#HOTT
Export control restrictions based upon applicable laws and regulations would prohibit candidates who are nationals of certain embargoed countries from working in this position without Cirrus Logic first obtaining an export license. Candidates for this role must be able to access technical data without a requirement for an export license. We are unable to sponsor or obtain export licenses for this role.
Cirrus Logic strives to select the best qualified applicant for any opening. Different approaches, ideas and points of view are both valued and respected. Employment decisions are made on the basis of job-related criteria without regard to race, color, religion, sex, national origin, age, protected veteran or disabled status, genetic information, or any other classification protected by applicable law.