You will work as a team with layout designers and engineers, local and/or globally to complete full ... Responsibilities include all aspects of IC mask design from creating full chip floor plans ...
You will work as a team with layout designers and engineers, local and/or globally to complete full ... Responsibilities include all aspects of IC mask design from creating full chip floor plans ...
You will work as a team with layout designers and engineers, local and/or globally to complete full ... Responsibilities include all aspects of IC mask design from creating full chip floor plans ...
You will work as a team with layout designers and engineers, local and/or globally to complete full ... Responsibilities include all aspects of IC mask design from creating full chip floor plans ...
We are seeking a Package Layout Design Engineer to join our hardware team and contribute to the physical design of advanced IC packages for next-generation machine learning and data center ASICs. In ...
We are seeking a Package Layout Design Engineer to join our hardware team and contribute to the physical design of advanced IC packages for next-generation machine learning and data center ASICs. In ...
We are seeking a Package Layout Design Engineer to join our hardware team and contribute to the physical design of advanced IC packages for next-generation machine learning and data center ASICs. In ...
We are seeking a Package Layout Design Engineer to join our hardware team and contribute to the physical design of advanced IC packages for next-generation machine learning and data center ASICs. In ...
We are seeking a Package Layout Design Engineer to join our hardware team and contribute to the physical design of advanced IC packages for next-generation machine learning and data center ASICs. In ...
We are seeking a Package Layout Design Engineer to join our hardware team and contribute to the physical design of advanced IC packages for next-generation machine learning and data center ASICs. In ...
We are seeking a Package Layout Design Engineer to join our hardware team and contribute to the physical design of advanced IC packages for next-generation machine learning and data center ASICs. In ...
We are seeking a Package Layout Design Engineer to join our hardware team and contribute to the physical design of advanced IC packages for next-generation machine learning and data center ASICs. In ...
We are seeking a Package Layout Design Engineer to join our hardware team and contribute to the physical design of advanced IC packages for next-generation machine learning and data center ASICs. In ...
We are seeking a Package Layout Design Engineer to join our hardware team and contribute to the physical design of advanced IC packages for next-generation machine learning and data center ASICs. In ...
We are seeking a Package Layout Design Engineer to join our hardware team and contribute to the physical design of advanced IC packages for next-generation machine learning and data center ASICs. In ...
We are seeking a Package Layout Design Engineer to join our hardware team and contribute to the physical design of advanced IC packages for next-generation machine learning and data center ASICs. In ...
Analog and Mixed Signal Design Engineer
Chandler, AZ · On-site
$110 - $176/hr
Layout & Post-Layout Validation: Supervise layout design and verify post-layout design using SPICE ... MS or PhD in Electrical Engineering * 6+ years of mixed-signal and analog design experience. Design ...
Analog and Mixed Signal Design Engineer
Chandler, AZ · On-site
$110 - $176/hr
Layout & Post-Layout Validation: Supervise layout design and verify post-layout design using SPICE ... MS or PhD in Electrical Engineering * 6+ years of mixed-signal and analog design experience. Design ...
Analog and Mixed Signal Design Engineer
Chandler, AZ · On-site
$198K/yr
Layout & Post-Layout Validation: Supervise layout design and verify post-layout design using SPICE ... MS or PhD in Electrical Engineering * 6+ years of mixed-signal and analog design experience. Design ...
Analog and Mixed Signal Design Engineer
Chandler, AZ · On-site
$198K/yr
Layout & Post-Layout Validation: Supervise layout design and verify post-layout design using SPICE ... MS or PhD in Electrical Engineering * 6+ years of mixed-signal and analog design experience. Design ...
Analog and Mixed Signal Design Engineer
Chandler, AZ · On-site
$198K/yr
Layout & Post-Layout Validation: Supervise layout design and verify post-layout design using SPICE ... MS or PhD in Electrical Engineering * 6+ years of mixed-signal and analog design experience. Design ...
Analog and Mixed Signal Design Engineer
Chandler, AZ · On-site
$198K/yr
Layout & Post-Layout Validation: Supervise layout design and verify post-layout design using SPICE ... MS or PhD in Electrical Engineering * 6+ years of mixed-signal and analog design experience. Design ...
Senior Layout Designer / Layout Engineer
Phoenix, AZ · On-site
$90 - $140/hr
Senior Layout Designer / Layout Engineer Uses AI large language models and vibe-coding platforms as ... About the Role Lead the design and coordination of complex process equipment layouts for ...
New
Senior Layout Designer / Layout Engineer
Phoenix, AZ · On-site
$90 - $140/hr
Senior Layout Designer / Layout Engineer Uses AI large language models and vibe-coding platforms as ... About the Role Lead the design and coordination of complex process equipment layouts for ...
New
Proactively work with design engineers to achieve efficient circuit performance * Design analog & mixed-signal layouts * Understand device matching techniques * Understand signal conditioning ...
Proactively work with design engineers to achieve efficient circuit performance * Design analog & mixed-signal layouts * Understand device matching techniques * Understand signal conditioning ...
Staff Package Design Engineer
Tempe, AZ · On-site
... engineering teams. Key Responsibilities ... Execute package layout design and development for advanced package technologies, including power ...
Staff Package Design Engineer
Tempe, AZ · On-site
... engineering teams. Key Responsibilities ... Execute package layout design and development for advanced package technologies, including power ...
Silicon Packaging Design Engineer
Phoenix, AZ · On-site
$105K - $149K/yr
As a Silicon Packaging Design Engineer, you will play a pivotal role in driving the development of ... Drive the physical layout and routing of package designs, ensuring alignment with silicon, package ...
Silicon Packaging Design Engineer
Phoenix, AZ · On-site
$105K - $149K/yr
As a Silicon Packaging Design Engineer, you will play a pivotal role in driving the development of ... Drive the physical layout and routing of package designs, ensuring alignment with silicon, package ...
Silicon Packaging Design Engineer
Phoenix, AZ · On-site
$105K - $149K/yr
As a Silicon Packaging Design Engineer, you will play a pivotal role in driving the development of ... Drive the physical layout and routing of package designs, ensuring alignment with silicon, package ...
Silicon Packaging Design Engineer
Phoenix, AZ · On-site
$105K - $149K/yr
As a Silicon Packaging Design Engineer, you will play a pivotal role in driving the development of ... Drive the physical layout and routing of package designs, ensuring alignment with silicon, package ...
We are seeking a Principal Device Design Engineer to develop cutting-edge switching power MOSFETs ... layout experiments for engineering lots to minimize development cycle time * Execute test mask and ...
We are seeking a Principal Device Design Engineer to develop cutting-edge switching power MOSFETs ... layout experiments for engineering lots to minimize development cycle time * Execute test mask and ...
We are seeking a Principal Device Design Engineer to develop cutting-edge switching power MOSFETs ... layout experiments for engineering lots to minimize development cycle time * Execute test mask and ...
We are seeking a Principal Device Design Engineer to develop cutting-edge switching power MOSFETs ... layout experiments for engineering lots to minimize development cycle time * Execute test mask and ...
We are seeking a Principal Device Design Engineer to develop cutting-edge switching power MOSFETs ... layout experiments for engineering lots to minimize development cycle time * Execute test mask and ...
Quick apply
We are seeking a Principal Device Design Engineer to develop cutting-edge switching power MOSFETs ... layout experiments for engineering lots to minimize development cycle time * Execute test mask and ...
We are seeking a Principal Device Design Engineer to develop cutting-edge switching power MOSFETs ... layout experiments for engineering lots to minimize development cycle time * Execute test mask and ...
We are seeking a Principal Device Design Engineer to develop cutting-edge switching power MOSFETs ... layout experiments for engineering lots to minimize development cycle time * Execute test mask and ...
Contract Mask Layout Design Engineer information
See Phoenix, AZ salary details
$44.7K - $57.4K
4% of jobs
$57.4K - $70K
2% of jobs
$70K - $82.7K
12% of jobs
$93K is the 25th percentile. Wages below this are outliers.
$82.7K - $95.4K
9% of jobs
$95.4K - $108.1K
11% of jobs
The median wage is $119.8K / yr.
$108.1K - $120.8K
14% of jobs
$120.8K - $133.5K
22% of jobs
$135.8K is the 75th percentile. Wages above this are outliers.
$133.5K - $146.1K
9% of jobs
$146.1K - $158.8K
9% of jobs
$158.8K - $171.5K
3% of jobs
$171.5K - $184.2K
6% of jobs
$44.7K
$120K
$184.2K
How much do contract mask layout design engineer jobs pay per year?
What is the difference between Contract Mask Layout Design Engineer vs Mask Layout Design Engineer?
| Aspect | Contract Mask Layout Design Engineer | Mask Layout Design Engineer |
|---|---|---|
| Credentials | Bachelor's or Master's in Electrical Engineering or related field; experience with mask design tools | Same as Contract Mask Layout Design Engineer |
| Work Environment | Typically contract-based, project-specific, often freelance or consulting roles | Full-time or in-house positions within semiconductor companies |
| Industry Usage | Used in industries requiring flexible, project-based mask design services |
The main difference is that Contract Mask Layout Design Engineers work on a temporary, project basis, often with multiple clients, while Mask Layout Design Engineers are usually employed full-time within a company. Both roles require similar skills and credentials, but their work arrangements and employment types differ.
What are popular job titles related to Contract Mask Layout Design Engineer jobs in Phoenix, AZ?
For Contract Mask Layout Design Engineer jobs in Phoenix, AZ, the most frequently searched job titles are:
What job categories do people searching Contract Mask Layout Design Engineer jobs in Phoenix, AZ look for?
The top searched job categories for Contract Mask Layout Design Engineer jobs in Phoenix, AZ are:

Analog Devices rating
8.7
Based on 19 frontline employees who took The Breakroom Quiz
18th of 161 rated electronics manufacturers
Job description
Come join Analog Devices (ADI) - a place where Innovation meets Impact. For more than 55 years, Analog Devices has been inventing new breakthrough technologies that transform lives. At ADI you will work alongside the brightest minds to collaborate on solving complex problems that matter from autonomous vehicles, drones and factories to augmented reality and remote healthcare.
ADI fosters a culture that focuses on employees through beneficial programs, aligned goals, continuous learning opportunities, and practices that create a more sustainable future.
About Analog Devices
Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.comand on LinkedIn and X.
Job Description:
The Automotive Solutions Group needs entry level computer draftsman interested in learning mask design for advanced analog and mixed-signal ICs. You will work as a team with layout designers and engineers, local and/or globally to complete full chip projects.
Responsibilities include all aspects of IC mask design from creating full chip floor plans, planning schedules, hookup, and verification to tape out. On the job training provided to develop your skills.
Minimum Qualifications:
Comfortable with computers and working on a computer continuously as a full-time job.
Good written and verbal communication skills
Good puzzle solving skills
Good spatial awareness skills
Eager to learn with strong memory retention skills
Ability to work well in a team environment
Accepting of change that comes from innovation
Detail-oriented
Preferred Qualifications:
High school graduate or equivalent (General Education Diploma).
At least eighteen years old.
Computer programming / coding a plus
Key learning objectives of the program:
Use Cadence Virtuoso Layout XL editor
Generate high-quality placements.
Carefully and methodically route sub-cells and blocks.
Basic Power Fet metallization.
LVS, DRC, Latchup and Antenna Verification using Calibre
Gain ability to work on layouts independently.
Basic proficiency using Linux
What are the key competencies required to be successful on the program?
Comfortable with computers and working on a computer continuously as a full-time job.
Good written and verbal communication skills
Good puzzle solving skills
Good spatial awareness skills
Eager to learn with strong memory retention skills
Ability to work well in a team environment
Ability to embrace change
Detail-oriented
Schedule meetings with SLD's to ask questions and gain knowledge
Spend time studying things you need to understand
Length of the program
6-month training period with a purpose of progressing in the Layout Career Path.
What training will be provided?
A class-style setting and seating arrangement with assignments and exams to show retention of learning. Multiple mentors to help give a well-rounded learning experience. Exams will not test beyond what has been taught.
For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process.
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
EEO is the Law: Notice of Applicant Rights Under the Law.
Job Req Type: Graduate JobRequired Travel: NoWhat Analog Devices employees say
Pay
Benefits
Hours and flexibility
Workplace
Get the full story on Breakroom
About Analog Devices
Sourced by ZipRecruiter
Analog Devices (NASDAQ: ADI) designs and manufactures semiconductor products and solutions. We enable our customers to interpret the world around us by intelligently bridging the physical and digital worlds with unmatched technologies that sense, measure and connect.
Industry
Electrical equipment, appliance, and component manufacturing
Company size
5,001 - 10,000 Employees
Headquarters location
Norwood, MA, US