SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... Bachelor's degree in electrical engineering, computer engineering or computer science * 5+ years of ...
SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... Bachelor's degree in electrical engineering, computer engineering or computer science * 5+ years of ...
NVIDIA has been redefining computer graphics, PC gaming, and accelerated computing for more than 25 ... engineers can drive complex tasks and cut ramp time. * Push the limits of what's possible in chip ...
NVIDIA has been redefining computer graphics, PC gaming, and accelerated computing for more than 25 ... engineers can drive complex tasks and cut ramp time. * Push the limits of what's possible in chip ...
NVIDIA has been redefining computer graphics, PC gaming, and accelerated computing for more than 25 ... engineers can drive complex tasks and cut ramp time. Push the limits of what's possible in chip ...
NVIDIA has been redefining computer graphics, PC gaming, and accelerated computing for more than 25 ... engineers can drive complex tasks and cut ramp time. Push the limits of what's possible in chip ...
NVIDIA has been redefining computer graphics, PC gaming, and accelerated computing for more than 25 ... engineers can drive complex tasks and cut ramp time. * Push the limits of what's possible in chip ...
NVIDIA has been redefining computer graphics, PC gaming, and accelerated computing for more than 25 ... engineers can drive complex tasks and cut ramp time. * Push the limits of what's possible in chip ...
Mechanical Engineer
Fremont, CA · On-site
$110K - $130K/yr
Description We are seeking a Mechanical Design Engineer to join our multi-disciplinary team focused ... computer chip built in the world. Nova dives deep into dimensions and layers at the atomic level to ...
Mechanical Engineer
Fremont, CA · On-site
$110K - $130K/yr
Description We are seeking a Mechanical Design Engineer to join our multi-disciplinary team focused ... computer chip built in the world. Nova dives deep into dimensions and layers at the atomic level to ...
CAD Engineer - Signoff Infrastructure
Austin, TX · On-site
$150K - $277K/yr
We're seeking a CAD Engineer to join our team and develop full-stack web applications that power ... Signoff is the critical final verification stage in chip design where designs are validated against ...
CAD Engineer - Signoff Infrastructure
Austin, TX · On-site
$150K - $277K/yr
We're seeking a CAD Engineer to join our team and develop full-stack web applications that power ... Signoff is the critical final verification stage in chip design where designs are validated against ...
D. in Electrical Engineering, Computer Engineering, or related discipline. * 20+ years of semiconductor industry experience with substantial leadership responsibility. * Proven experience as a Chip ...
Quick apply
D. in Electrical Engineering, Computer Engineering, or related discipline. * 20+ years of semiconductor industry experience with substantial leadership responsibility. * Proven experience as a Chip ...
Senior Principal Engineer- SoC/Chip Lead
San Jose, CA · On-site
$147K - $202K/yr
D. in Electrical Engineering, Computer Engineering, or related discipline. * 20+ years of semiconductor industry experience with substantial leadership responsibility. * Proven experience as a Chip ...
Senior Principal Engineer- SoC/Chip Lead
San Jose, CA · On-site
$147K - $202K/yr
D. in Electrical Engineering, Computer Engineering, or related discipline. * 20+ years of semiconductor industry experience with substantial leadership responsibility. * Proven experience as a Chip ...
CAD Engineer - Signoff Infrastructure
$150K - $277K/yr
We're seeking a CAD Engineer to join our team and develop full-stack web applications that power ... Signoff is the critical final verification stage in chip design where designs are validated against ...
CAD Engineer - Signoff Infrastructure
$150K - $277K/yr
We're seeking a CAD Engineer to join our team and develop full-stack web applications that power ... Signoff is the critical final verification stage in chip design where designs are validated against ...
D. in Electrical Engineering, Computer Engineering, or related discipline. * 20+ years of semiconductor industry experience with substantial leadership responsibility. * Proven experience as a Chip ...
Quick apply
D. in Electrical Engineering, Computer Engineering, or related discipline. * 20+ years of semiconductor industry experience with substantial leadership responsibility. * Proven experience as a Chip ...
As a software engineer, you will craft highly efficient software to automate and facilitate chip ... Solid understanding of algorithms, computer architecture and computer science theory * Experienced ...
As a software engineer, you will craft highly efficient software to automate and facilitate chip ... Solid understanding of algorithms, computer architecture and computer science theory * Experienced ...
Front-End CAD Engineer
Cupertino, CA · On-site
$2.0K/mo
Ability to automate and optimize CAD workflows for chip design verification. * Ability to interface ... We do not have boundaries between engineering and research, and we expect all of our technical ...
Front-End CAD Engineer
Cupertino, CA · On-site
$2.0K/mo
Ability to automate and optimize CAD workflows for chip design verification. * Ability to interface ... We do not have boundaries between engineering and research, and we expect all of our technical ...
Front-End CAD Engineer
Cupertino, CA · On-site
$2.0K/mo
Ability to automate and optimize CAD workflows for chip design verification. * Ability to interface ... We do not have boundaries between engineering and research, and we expect all of our technical ...
Front-End CAD Engineer
Cupertino, CA · On-site
$2.0K/mo
Ability to automate and optimize CAD workflows for chip design verification. * Ability to interface ... We do not have boundaries between engineering and research, and we expect all of our technical ...
Front-End CAD Engineer
Cupertino, CA · On-site
$2.0K/mo
Ability to automate and optimize CAD workflows for chip design verification. * Ability to interface ... We do not have boundaries between engineering and research, and we expect all of our technical ...
Front-End CAD Engineer
Cupertino, CA · On-site
$2.0K/mo
Ability to automate and optimize CAD workflows for chip design verification. * Ability to interface ... We do not have boundaries between engineering and research, and we expect all of our technical ...
Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience. * 8 years of technical experience in silicon timing closure and chip integration. * Experience in ...
Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience. * 8 years of technical experience in silicon timing closure and chip integration. * Experience in ...
Firmware Engineer
Fremont, CA · On-site
$130K - $170K/yr
The engineer will collaborate closely with electrical and systems engineering teams to integrate ... computer chip built in the world. Nova dives deep into dimensions and layers at the atomic level to ...
Firmware Engineer
Fremont, CA · On-site
$130K - $170K/yr
The engineer will collaborate closely with electrical and systems engineering teams to integrate ... computer chip built in the world. Nova dives deep into dimensions and layers at the atomic level to ...
As a software engineer, you will craft highly efficient software to automate and facilitate chip ... Solid understanding of algorithms, computer architecture and computer science theory. * Experienced ...
As a software engineer, you will craft highly efficient software to automate and facilitate chip ... Solid understanding of algorithms, computer architecture and computer science theory. * Experienced ...
Description As a Full Chip Integration Engineer, you will be participating in the physical design ... CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with ...
Description As a Full Chip Integration Engineer, you will be participating in the physical design ... CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with ...
Description As a Full Chip Integration Engineer, you will be participating in the physical design ... CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with ...
Description As a Full Chip Integration Engineer, you will be participating in the physical design ... CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with ...
Senior Principal Engineer- SoC/Chip Lead
San Jose, CA · On-site
$147K - $202K/yr
D. in Electrical Engineering, Computer Engineering, or related discipline. * 20+ years of semiconductor industry experience with substantial leadership responsibility. * Proven experience as a Chip ...
Senior Principal Engineer- SoC/Chip Lead
San Jose, CA · On-site
$147K - $202K/yr
D. in Electrical Engineering, Computer Engineering, or related discipline. * 20+ years of semiconductor industry experience with substantial leadership responsibility. * Proven experience as a Chip ...
Computer Chip Engineer information
See salary details
$48.5K - $56.6K
0% of jobs
$56.6K - $64.7K
0% of jobs
$64.7K - $72.8K
7% of jobs
$72.8K - $80.9K
0% of jobs
$80.9K - $89K
0% of jobs
$89K - $97K
1% of jobs
$97K - $105.1K
0% of jobs
$109.9K is the 25th percentile. Wages below this are outliers.
$105.1K - $113.2K
28% of jobs
$113.2K - $121.3K
1% of jobs
$121.3K - $129.4K
0% of jobs
The median wage is $131K / yr.
$129.4K - $137.5K
62% of jobs
$48.5K
$121.5K
$137.5K
How much do computer chip engineer jobs pay per year?
What is a computer chip engineer?
A Computer Chip Engineer designs, develops, and tests microchips used in electronic devices. They work with semiconductor materials, circuit design, and fabrication processes to create efficient and high-performance chips. Their role involves collaboration with hardware and software engineers to optimize chip functionality. They may also troubleshoot and improve existing chip designs to enhance performance and energy efficiency.
What are the key skills and qualifications needed to thrive as a computer chip engineer?
To thrive as a Computer Chip Engineer, you need a deep understanding of electrical engineering, semiconductor physics, and integrated circuit (IC) design, typically supported by a bachelor's or master’s degree in electrical engineering or a related field. Familiarity with hardware description languages (such as VHDL or Verilog), Electronic Design Automation (EDA) tools, and industry certifications like IPC or IEEE standards is highly valuable. Strong analytical thinking, attention to detail, problem-solving abilities, and effective teamwork are essential soft skills. These competencies are vital for creating reliable, high-performance microchips while meeting strict timelines and collaborating across multidisciplinary teams.
What are some common challenges faced by computer chip engineers, and how can new hires prepare for them?
Computer Chip Engineers often deal with complex problems like optimizing designs for power, speed, and area while ensuring manufacturability and reliability. New hires may find it challenging to keep up with rapid technological advancements and manage tight project deadlines. Developing strong foundations in semiconductor theory, staying current with the latest EDA tools, and practicing collaborative communication will help address these challenges. Being proactive in seeking mentorship and participating in cross-functional meetings can also accelerate your adaptation and success within engineering teams.
How much does a computer chip engineer make?
What does a computer chip engineer do?
What are the most commonly searched types of Computer Chip Engineer jobs?
The most popular types of Computer Chip Engineer jobs are:
What states have the most Computer Chip Engineer jobs?
States with the most job openings for Computer Chip Engineer jobs include:
What are popular job titles related to Computer Chip Engineer jobs?
For Computer Chip Engineer jobs, the most frequently searched job titles are:

Sr. Full Chip Physical Verification Engineer (Silicon Engineering)
Austin, TX
$134K/yr
Full-time
Re-posted 11 days ago
SpaceX rating
8.7
Based on 152 frontline employees who took The Breakroom Quiz
Job description
SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING)
At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system - thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact and are looking for best-in-class engineers to help maximize Starlink's utility for communities and businesses around the globe.
We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation silicon for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.
RESPONSIBILITIES:
- Own and execute full-chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools like Calibre, ICV, or Pegasus
- Develop, maintain, and optimize physical verification flows for advanced node SoC's.
- Interpret and implement foundry Design Rule Manuals (DRM) - translate rule updates into verified flow changes
- Debug and resolve complex DRC/LVS violations across hierarchical full-chip designs
- Perform ESD verification - validate protection strategies, current paths, and CDM/HBM compliance
- Drive tapeout readiness by coordinating signoff across block and top-level and Hard IP design teams
- Engage directly with foundry teams to resolve DRM ambiguities and waiver requests.
- Develop/modify design flows as needed to meet the overall design quality of results and chip integration requirements.Leverage AI agents to automate rule deck validation, violation triage, and signoff reporting workflows
BASIC QUALIFICATIONS:
- Bachelor's degree in electrical engineering, computer engineering or computer science
- 5+ years of ASIC and/or physical design flow development experience in industry
PREFERRED SKILLS AND EXPERIENCE:
- Experience and deep understanding of SOC top level physical design flows (floor-planning, I/O, bump & RDL planning, hard IP integration, partitioning, power/ground grid generation, pin assignment, DFT, partition hardening, special clock handling, feedthrough flows, special interface/interconnect planning and implementation)
- Experience in IP integration (e.g. memories, I/O's, analog IPs, SerDes, DDR etc.)
- Deep expertise in DRC, LVS, PERC and ESD verification methodologies
- Hands-on proficiency with Calibre, ICV (IC Validator), or Pegasus
- Direct foundry DRM experience - able to read, interpret, and implement complex rule decks
- Experience at advanced nodes (4nm and below)
- Experience with large SOC designs (>10M gates) with frequencies in excess of 1GHZ
- Excellent scripting skills (csh/bash, Perl, Python TCL, Makefile etc.)
- Self-driven individual with a can-do attitude, and an ability to work in a dynamic group environment
ADDITIONAL REQUIREMENTS:
- Ability to work extended hours and weekends as needed to meet critical project milestones
About SpaceX
Sourced by ZipRecruiter
Industry
Aerospace product and parts manufacturing, data services, guided missile and space vehicle manufacturing and satellite telecommunications
Company size
1,001 - 5,000 Employees
Headquarters location
Hawthorne, CA, US