1

Chip Random Test Verification Engineer Jobs (NOW HIRING)

... random tests. - Run simulations and debug design and environment issues. - Create functional ... block, subsystem and chip level engineers to ensure seamless verification flow. Preferred ...

Staff Design Verification Engineer

Chandler, AZ ยท On-site

$133K - $163K/yr

You will be responsible for end-to-end functional verification across block-level and chip-level ... Create directed and constrained-random test suites to ensure robust functional coverage.

... random tests. - Run simulations and debug design and environment issues. - Create functional ... block, subsystem and chip level engineers to ensure seamless verification flow. Preferred ...

SOC Design Verification Engineer

San Diego, CA ยท On-site

$144K - $176K/yr

Create directed and constrained-random test scenarios to validate functionality and architectural ... Experience in full-chip or subsystem verification environments. Preferred Candidate Profile The ...

C - Focused Design Verification Engineer

San Diego, CA ยท On-site

$144K - $176K/yr

... random testing, and debugging Solid understanding of reusable verification framework Knowledge of ... chip architecture, and microarchitecture Develop complex tests or power vectors in assembly, or C ...

IC Design Verification Engineer

San Jose, CA ยท On-site

$159K - $194K/yr

From chip-to-chip optical interconnects to scalable photonic engines, Lumilens is unlocking a new ... Write directed and constrained-random tests ; develop functional coverage and drive it to closure.

Showing results 41-60

Chip Random Test Verification Engineer information

See salary details

$80K

$142.6K

$203.5K

How much do chip random test verification engineer jobs pay per year?

As of Sep 10, 2026, the average yearly pay for chip random test verification engineer in the United States is $142,619.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.

What is a chip random test verification engineer?

Chip Random Test Verification Engineers are professionals who design, develop, and execute randomized test scenarios to verify the functionality and reliability of semiconductor chips. They use advanced verification methodologies, such as constrained-random simulation and coverage-driven verification, to identify potential design flaws before fabrication. These engineers work closely with design teams to create testbenches, analyze test results, and ensure that the chip meets all specifications and quality standards. Their work is crucial in detecting subtle bugs that might not be found with deterministic testing, ultimately improving chip performance and reducing costly errors.

What are some common challenges faced by a chip random test verification engineer and how can they be addressed?

Chip Random Test Verification Engineers often encounter challenges such as debugging complex test failures, ensuring comprehensive coverage, and managing large volumes of simulation data. Debugging can be time-consuming due to the random nature of test failures, which may be difficult to reproduce. To address these issues, engineers typically use advanced verification tools, maintain detailed logs, and collaborate closely with design and software teams for root cause analysis. Regular knowledge sharing within the team and adopting systematic debugging methodologies can also help streamline the verification process.

What are the key skills and qualifications needed to thrive as a chip random test verification engineer, and why are they important?

To thrive as a Chip Random Test Verification Engineer, you need a solid background in digital design, verification methodologies, and programming languages like SystemVerilog or UVM, typically supported by a degree in electrical engineering or computer engineering. Familiarity with simulation tools (e.g., ModelSim, VCS), testbench creation, and scripting languages such as Python or Perl is essential. Strong analytical thinking, attention to detail, and communication skills help you effectively collaborate with design teams and debug complex issues. These skills and qualities ensure the reliability and functionality of semiconductor chips before production, reducing costly errors and ensuring quality.

What are popular job titles related to Chip Random Test Verification Engineer jobs?

For Chip Random Test Verification Engineer jobs, the most frequently searched job titles are:

Software Test & Verification Engineer

El Segundo, CA โ€ข On-site

Other

Posted 23 days ago


Job description

Position

Takes about 3 minutes. No account required.


Overview

Secret Clearance Required to Start.


Position is 100% onsite.


The Company is looking for a Senior Software Test & Verification Engineer to join the Ground Software Engineering team located in El Segundo, CA. This position will focus on supporting the Company Defense, Space & Security (BDS) Satellite Systems Software Engineering organization.


Our team creates software tools and services for the worldโ€™s highest performing satellite/ground systems for USG and Commercial customers. We work with customers in the development of the next generation ground systems.


This is an opportunity to work in a rapid development environment using modern technology, architecture, and tools. Our team works within an agile methodology using a CI/CD environment; integrated with automated testing, vulnerability, & quality scanning capabilities. Your skills and interests will be leveraged in conjunction with Systems Engineering and Software Development teams to deliver suites of automated regression tests and completed software products for delivery to customers.


This senior position requires proven experience within the software ecosystem, a unique background of project experience, and the clear exhibition of superior judgment and decision making to engineer new solutions and capabilities. Critical thinking and troubleshooting skills are required!


At The Company Company, we innovate and collaborate to make the world a better place. From the seabed to outer space, you can contribute to work that matters with a company where diversity, equity and inclusion are shared values. Weโ€™re committed to fostering an environment for every teammate thatโ€™s welcoming, respectful and inclusive, with great opportunity for professional growth. Find your future with us.


Position Responsibilities:

  • Support verification development and review of the Test Cases, Test Procedures and conduct Informal and Formal Test Readiness Reviews (TRR).

  • Leading Software Test Team in the formal verification of the software requirements.

  • Leading Factory Acceptance Tests (FATs) with the test team, maintaining the run log and daily report.

  • Documentation of any issues and problem reports encountered during test using change control tools.

  • Routine reporting of issue burnup charts and verification development status at program management review meetings.

  • Tracking the status of open issues identified during development, informal and formal test execution to closure to meet the deliverables.

  • Supporting/Analyzing internal and external customer Problem Report (PR) and acting as integrator for the Ground Mission Software working with Flight Software, Satellite Simulation, Ground Systems Engineering, and Ground Software leads.

  • Release all the software life cycle documents per the Company Process.

  • Leading team to meet the compliance to software development and verification processes in support of internal and external Audit with Quality Assurance team.

  • Leading team to develop Software Verification Life Cycle documents.

  • Support Change Control Board (CCB) activities related to Software Verification process.

  • Support planning for Deliverables (Verification Plans, Requirement Deviations, Requirements, Test Reports etc) to meet program milestones.


12+ months โ€” possible extension and possible FTE opportunity.


Requirements
What you'll need

Required Skills:



  • Bachelorโ€™s Degree

  • DoD Secret Clearance

  • 5+ years of experience executing or leading automated/functional and end-to-end testing activities

  • 5+ years of experience in the Software Development lifecycle (including Requirements Analysis, Design, Code, Integration & Test)

  • 3+ years of experience with software development using either Java, C++, or Python

  • Experience working in an Agile software development environment and DevOps methodologies.


Preferred Skills:



  • Experience as a Product Owner/Technical Lead and/or Integration & Test Lead for government programs.

  • Understanding of Command and Control (C2) systems, real-time applications, and their specific requirements.

  • Experience with database technologies (SQL/NoSQL), messaging systems (e.g., Kafka, ActiveMQ), and data streaming technologies (e.g., CCSDS).

  • Familiarity with containerization tools (e.g., Docker, Kubernetes) and orchestration platforms.

  • Knowledge of how to derive and allocate requirements (e.g., system, sub-system, software) and show traceability throughout the product lifecycle.

  • Ability to design and develop automation of software tests, execute automated tests, track results, manage test data, and utilize results to improve software quality.

  • Experience leading various formal acceptance testing activities (e.g., Formal Qualification Test -FQT, Factory Acceptance Test - FAT, Site Acceptance Test - SAT)

  • Active TS/SCI or DoD Top Secret clearance.


Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, computer science, mathematics, physics or chemistry (e.g. Bachelor) and typically 9 or more years' related work experience (e.g. PhD+4 years' related work experience, Master+7 years' related work experience). In the USA, ABET accreditation is the preferred, although not required, accreditation standard.


CTS pays for referrals

Know someone who'd fit this role?Refer them โ€” you're both rewarded when they're placed.

#J-18808-Ljbffr