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Chip Design Engineer Jobs in Vermont (NOW HIRING)

Product Line Manager IV

Burlington, VT · On-site

$128K - $176K/yr

Who We Are Applied Materials is a global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service cutting ...

Product Line Manager IV

Burlington, VT · On-site

$128K - $176K/yr

Who We Are Applied Materials is a global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service cutting ...

Showing results 21-30

Chip Design Engineer information

See Vermont salary details

$43.1K

$93.7K

$168.5K

How much do chip design engineer jobs pay per year?

As of Sep 10, 2026, the average yearly pay for chip design engineer in Vermont is $93,725.00, according to ZipRecruiter salary data. Most workers in this role earn between $72,300.00 and $104,700.00 per year, depending on experience, location, and employer.

What is a chip design engineer?

A Chip Design Engineer is responsible for designing and developing integrated circuits (ICs) used in electronic devices. They work with hardware description languages (HDLs) like Verilog or VHDL to create digital or analog circuit designs. Their role includes logic design, verification, simulation, and testing to ensure performance and power efficiency. They collaborate with teams across hardware, software, and manufacturing to bring chips from concept to production. Chip Design Engineers are essential in industries like consumer electronics, automotive, and telecommunications.

What are some typical projects or daily tasks for a chip design engineer?

As a Chip Design Engineer, your daily tasks often include designing and simulating integrated circuits, reviewing schematics, writing and verifying code in hardware description languages, and collaborating closely with layout engineers and verification teams. You may also participate in design reviews, troubleshoot potential issues, and optimize chip performance to meet specific requirements. Working with cross-functional teams, including software engineers and product managers, is common to ensure the chip integrates seamlessly with end products. This role provides opportunities to see your designs progress from concept to final manufacturing, offering valuable hands-on experience at each stage of development.

What are the key skills and qualifications needed to thrive as a chip design engineer?

To thrive as a Chip Design Engineer, you need a solid background in electrical engineering, digital and analog circuit design, and experience with VLSI principles, usually backed by a relevant degree. Proficiency with industry-standard tools like Cadence, Synopsys, and experience in HDL languages (such as Verilog or VHDL) is highly valued, as are certifications like Certified IC Designer. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help set you apart. These competencies are critical for developing reliable, high-performance chips in a collaborative and deadline-driven environment.

How much do chip design engineers make?

Chip design engineers typically earn a median annual salary ranging from $90,000 to $130,000, depending on experience, location, and industry. Senior engineers with specialized skills in VLSI design or FPGA development can earn higher salaries, often exceeding $150,000 annually.

What does a chip design engineer do?

A chip design engineer develops and designs integrated circuits and microchips used in electronic devices. They use electronic design automation (EDA) tools, create schematics, simulate circuit performance, and collaborate with manufacturing teams to ensure the chips meet specifications and quality standards.

What is the salary of chip design engineer?

The average salary of a chip design engineer varies by experience and location but typically ranges from $80,000 to $150,000 annually. Senior engineers with specialized skills in VLSI design and FPGA development can earn higher salaries, often exceeding $180,000. Certifications and proficiency in tools like Cadence or Synopsys can also influence compensation.

What are popular job titles related to Chip Design Engineer jobs in Vermont?

For Chip Design Engineer jobs in Vermont, the most frequently searched job titles are:

What job categories do people searching Chip Design Engineer jobs in Vermont look for?

The top searched job categories for Chip Design Engineer jobs in Vermont are:

Infographic showing various Chip Design Engineer job openings in Vermont as of September 2026, with employment types broken down into 100% Full Time. Highlights an 100% In-person job distribution, with an average salary of $93,725 per year, or $45.1 per hour.

PMTS Silicon Photonics Packaging Integration

Essex Junction, VT • On-site

GlobalFoundries
Manufacturing • 10K+ employees

$131K - $241K/yr

Full-time

Re-posted 29 days ago


GlobalFoundries rating

8.3

Company rating: 8.3 out of 10

Based on 35 frontline employees who took The Breakroom Quiz


Job description

About GlobalFoundries:
  • GlobalFoundries (GF) is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world's most inspired technology companies. Our Advanced Packaging and Photonics Center (APPC) is at the forefront of enabling next-generation optical interconnects and heterogeneous integration (HI) for AI, HPC, and data center applications. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.

Summary of Role:
As a Photonic Packaging Engineer within GF's APPC, you will lead the development and sustainment of advanced optical packaging solutions for silicon photonics (SiPh) and co-packaged optics (CPO) platforms. You will collaborate across photonics, electrical, mechanical, and manufacturing teams to deliver scalable, low-loss, and cost-effective packaging architectures that meet stringent performance and reliability targets.
Essential Responsibilities:
  • Own the definition, design, and qualification of optical packaging architectures for SiPh-based modules, including fiber attach, photonic die placement, and thermal/mechanical integration.

  • Develop and implement scalable fiber-to-chip coupling strategies (e.g., V-groove, passive alignment, lens integration) for high-density optical I/O.

  • Drive heterogeneous integration (HI) of photonic and electronic components using 2.5D/3D/3.5D packaging technologies (e.g., TSV, Cu-Cu hybrid bonding, advanced molded integration).

  • Perform multiphysics simulations (thermal, mechanical, optical) to optimize package performance and reliability.

  • Lead root cause analysis and corrective actions for yield and reliability issues using FMEA, DOE, and FA tools.

  • Collaborate with OSATs and internal manufacturing teams to ensure mass production readiness and process transfer.

  • Support cost modeling and drive package cost reduction initiatives aligned with GF's B2B supply chain strategy.

  • Present technical updates and roadmaps to internal stakeholders and external partners.

Other Responsibilities:
Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.
Required Qualifications:
  • Master's degree or higher in Packaging, Materials Science, Mechanical Engineering, or related field.

  • 15+ years of experience in semiconductor packaging, with a focus on photonic or advanced packaging.

  • Hands-on experience with fiber attach processes, photonic alignment, and optical coupling techniques.

  • Familiarity with packaging technologies such as die attach, flip-chip, underfill, molding, and micro-optics integration.

  • Understanding of reliability standards and qualification methodologies for optical modules.

  • Excellent analytical, problem-solving, and communication skills.

  • Experience in bringing packaged products from development into production.

  • Strong written and spoken English communication skills.

Preferred Qualifications:
  • Experience with automated optical/electro-optical test setups and motion control systems (e.g., Python-based).

  • Knowledge of co-packaged optics (CPO), pluggable modules, and silicon photonics ecosystems.

  • Strong background in thermal/mechanical modeling and optical simulation tools (e.g., Lumerical, COMSOL).

  • Familiarity with GF's Fotonix™ platform, including 300mm monolithic SiPh integration and advanced packaging flows.

  • Experience working with OSATs and managing external development partners.

  • Demonstrated ability to lead cross-functional teams and influence technical direction.

Expected Salary Range
$131,900.00 - $241,500.00
The exact Salary will be determined based on qualifications, experience and location.
If you need a reasonable accommodation for any part of the employment process, please contact us by email at usaccommodations@gf.com and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address.
An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations.
GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential. GlobalFoundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory.
All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law

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